256 lines
7.9 KiB
C
256 lines
7.9 KiB
C
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/*
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* Copyright (C) 2013 Andrea Mazzoleni
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "internal.h"
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#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
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static const struct gfzconst16 {
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uint8_t poly[16];
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uint8_t half[16];
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uint8_t low7[16];
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} gfzconst16 __aligned(64) =
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{
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{
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0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
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0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d
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},
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{
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0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e,
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0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e
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},
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{
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0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
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0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f
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}
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};
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#endif
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#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
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/*
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* GENz (triple parity with powers of 2^-1) SSE2 implementation
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*/
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void raid_genz_sse2(int nd, size_t size, void **vv)
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{
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uint8_t **v = (uint8_t**)vv;
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uint8_t *p;
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uint8_t *q;
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uint8_t *r;
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int d, l;
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size_t i;
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l = nd - 1;
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p = v[nd];
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q = v[nd + 1];
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r = v[nd + 2];
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raid_sse_begin();
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asm volatile ("movdqa %0,%%xmm7" : : "m" (gfzconst16.poly[0]));
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asm volatile ("movdqa %0,%%xmm3" : : "m" (gfzconst16.half[0]));
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asm volatile ("movdqa %0,%%xmm6" : : "m" (gfzconst16.low7[0]));
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for (i = 0; i < size; i += 16) {
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asm volatile ("movdqa %0,%%xmm0" : : "m" (v[l][i]));
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asm volatile ("movdqa %xmm0,%xmm1");
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asm volatile ("movdqa %xmm0,%xmm2");
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for (d = l - 1; d >= 0; --d) {
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asm volatile ("pxor %xmm4,%xmm4");
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asm volatile ("pcmpgtb %xmm1,%xmm4");
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asm volatile ("paddb %xmm1,%xmm1");
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asm volatile ("pand %xmm7,%xmm4");
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asm volatile ("pxor %xmm4,%xmm1");
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asm volatile ("movdqa %xmm2,%xmm4");
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asm volatile ("pxor %xmm5,%xmm5");
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asm volatile ("psllw $7,%xmm4");
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asm volatile ("psrlw $1,%xmm2");
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asm volatile ("pcmpgtb %xmm4,%xmm5");
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asm volatile ("pand %xmm6,%xmm2");
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asm volatile ("pand %xmm3,%xmm5");
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asm volatile ("pxor %xmm5,%xmm2");
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asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
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asm volatile ("pxor %xmm4,%xmm0");
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asm volatile ("pxor %xmm4,%xmm1");
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asm volatile ("pxor %xmm4,%xmm2");
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}
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asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
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asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
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asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
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}
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raid_sse_end();
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}
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#endif
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#if defined(CONFIG_X86_64) && defined(CONFIG_SSE2)
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/*
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* GENz (triple parity with powers of 2^-1) SSE2 implementation
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*
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* Note that it uses 16 registers, meaning that x64 is required.
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*/
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void raid_genz_sse2ext(int nd, size_t size, void **vv)
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{
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uint8_t **v = (uint8_t**)vv;
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uint8_t *p;
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uint8_t *q;
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uint8_t *r;
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int d, l;
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size_t i;
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l = nd - 1;
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p = v[nd];
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q = v[nd + 1];
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r = v[nd + 2];
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raid_sse_begin();
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asm volatile ("movdqa %0,%%xmm7" : : "m" (gfzconst16.poly[0]));
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asm volatile ("movdqa %0,%%xmm3" : : "m" (gfzconst16.half[0]));
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asm volatile ("movdqa %0,%%xmm11" : : "m" (gfzconst16.low7[0]));
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for (i = 0; i < size; i += 32) {
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asm volatile ("movdqa %0,%%xmm0" : : "m" (v[l][i]));
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asm volatile ("movdqa %0,%%xmm8" : : "m" (v[l][i + 16]));
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asm volatile ("movdqa %xmm0,%xmm1");
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asm volatile ("movdqa %xmm8,%xmm9");
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asm volatile ("movdqa %xmm0,%xmm2");
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asm volatile ("movdqa %xmm8,%xmm10");
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for (d = l - 1; d >= 0; --d) {
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asm volatile ("movdqa %xmm2,%xmm6");
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asm volatile ("movdqa %xmm10,%xmm14");
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asm volatile ("pxor %xmm4,%xmm4");
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asm volatile ("pxor %xmm12,%xmm12");
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asm volatile ("pxor %xmm5,%xmm5");
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asm volatile ("pxor %xmm13,%xmm13");
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asm volatile ("psllw $7,%xmm6");
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asm volatile ("psllw $7,%xmm14");
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asm volatile ("psrlw $1,%xmm2");
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asm volatile ("psrlw $1,%xmm10");
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asm volatile ("pcmpgtb %xmm1,%xmm4");
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asm volatile ("pcmpgtb %xmm9,%xmm12");
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asm volatile ("pcmpgtb %xmm6,%xmm5");
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asm volatile ("pcmpgtb %xmm14,%xmm13");
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asm volatile ("paddb %xmm1,%xmm1");
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asm volatile ("paddb %xmm9,%xmm9");
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asm volatile ("pand %xmm11,%xmm2");
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asm volatile ("pand %xmm11,%xmm10");
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asm volatile ("pand %xmm7,%xmm4");
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asm volatile ("pand %xmm7,%xmm12");
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asm volatile ("pand %xmm3,%xmm5");
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asm volatile ("pand %xmm3,%xmm13");
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asm volatile ("pxor %xmm4,%xmm1");
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asm volatile ("pxor %xmm12,%xmm9");
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asm volatile ("pxor %xmm5,%xmm2");
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asm volatile ("pxor %xmm13,%xmm10");
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asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
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asm volatile ("movdqa %0,%%xmm12" : : "m" (v[d][i + 16]));
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asm volatile ("pxor %xmm4,%xmm0");
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asm volatile ("pxor %xmm4,%xmm1");
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asm volatile ("pxor %xmm4,%xmm2");
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asm volatile ("pxor %xmm12,%xmm8");
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asm volatile ("pxor %xmm12,%xmm9");
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asm volatile ("pxor %xmm12,%xmm10");
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}
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asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
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asm volatile ("movntdq %%xmm8,%0" : "=m" (p[i + 16]));
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asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
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asm volatile ("movntdq %%xmm9,%0" : "=m" (q[i + 16]));
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asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
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asm volatile ("movntdq %%xmm10,%0" : "=m" (r[i + 16]));
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}
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raid_sse_end();
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}
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#endif
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#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
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/*
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* GENz (triple parity with powers of 2^-1) AVX2 implementation
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*
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* Note that it uses 16 registers, meaning that x64 is required.
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*/
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void raid_genz_avx2ext(int nd, size_t size, void **vv)
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{
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uint8_t **v = (uint8_t**)vv;
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uint8_t *p;
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uint8_t *q;
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uint8_t *r;
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int d, l;
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size_t i;
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l = nd - 1;
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p = v[nd];
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q = v[nd + 1];
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r = v[nd + 2];
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raid_avx_begin();
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asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfzconst16.poly[0]));
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asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfzconst16.half[0]));
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asm volatile ("vbroadcasti128 %0,%%ymm11" : : "m" (gfzconst16.low7[0]));
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asm volatile ("vpxor %ymm15,%ymm15,%ymm15");
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for (i = 0; i < size; i += 64) {
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asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
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asm volatile ("vmovdqa %0,%%ymm8" : : "m" (v[l][i + 32]));
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asm volatile ("vmovdqa %ymm0,%ymm1");
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asm volatile ("vmovdqa %ymm8,%ymm9");
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asm volatile ("vmovdqa %ymm0,%ymm2");
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asm volatile ("vmovdqa %ymm8,%ymm10");
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for (d = l - 1; d >= 0; --d) {
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asm volatile ("vpsllw $7,%ymm2,%ymm6");
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asm volatile ("vpsllw $7,%ymm10,%ymm14");
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asm volatile ("vpsrlw $1,%ymm2,%ymm2");
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asm volatile ("vpsrlw $1,%ymm10,%ymm10");
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asm volatile ("vpcmpgtb %ymm1,%ymm15,%ymm4");
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asm volatile ("vpcmpgtb %ymm9,%ymm15,%ymm12");
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asm volatile ("vpcmpgtb %ymm6,%ymm15,%ymm5");
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asm volatile ("vpcmpgtb %ymm14,%ymm15,%ymm13");
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asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
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asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
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asm volatile ("vpand %ymm11,%ymm2,%ymm2");
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asm volatile ("vpand %ymm11,%ymm10,%ymm10");
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asm volatile ("vpand %ymm7,%ymm4,%ymm4");
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asm volatile ("vpand %ymm7,%ymm12,%ymm12");
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asm volatile ("vpand %ymm3,%ymm5,%ymm5");
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asm volatile ("vpand %ymm3,%ymm13,%ymm13");
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asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
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asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
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asm volatile ("vpxor %ymm5,%ymm2,%ymm2");
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asm volatile ("vpxor %ymm13,%ymm10,%ymm10");
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asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
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asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d][i + 32]));
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asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
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asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
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asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
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asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
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asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
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asm volatile ("vpxor %ymm12,%ymm10,%ymm10");
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}
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asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
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asm volatile ("vmovntdq %%ymm8,%0" : "=m" (p[i + 32]));
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asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
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asm volatile ("vmovntdq %%ymm9,%0" : "=m" (q[i + 32]));
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asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
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asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
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}
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raid_avx_end();
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}
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#endif
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