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Imported Upstream version 1.72

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This commit is contained in:
Mario Fetka
2017-04-22 12:54:30 +02:00
parent 0c8af0ce51
commit ae28dfe3af
52 changed files with 69477 additions and 87 deletions
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3
source/Makefile_Linux Executable file
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lsiutil: lsiutil.c
gcc -Wall -O lsiutil.c -o lsiutil
cp -p lsiutil /usr/bin

3
source/Makefile_Solaris Executable file
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lsiutil: lsiutil.c
gcc -Wall -O lsiutil.c -o lsiutil -D__sparc__ -ldevinfo
cp -p lsiutil /usr/bin

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source/Makefile_Windows Executable file
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lsiutil: lsiutil.c
gcc -Wall -O lsiutil.c -o lsiutil.exe -DWIN32

108
source/getopt.c Executable file
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/***************************************************************************
* *
* Copyright 2012 LSI Corporation. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Corporation. The *
* receipt of or possession of this file does not convey any rights to *
* reproduce or disclose its contents or to manufacture, use, or sell *
* anything it may describe, in whole, or in part, without the specific *
* written consent of LSI Corporation. *
* *
***************************************************************************
*/
#include "inc/getopt.h"
/* This function gets the next option letter from the console input.
It is supposed to be equivalent to the UNIX getopt function.
Options are preceeded by a dash, currently a slash is not allowed.
Multiple options after one dash are valid, and arguments after
the option with a colon between are supported.*/
/* Common varibles. */
int opterr = 1, /* error messages printed? default: yes */
optind = 1, /* index into parent argv vector */
optopt; /* character checked for validity */
char *optarg; /* argument associated with option */
#define EMSG ""
char *progname; /* may also be defined elsewhere */
static void
error(char *pch) /* error message routine */
{
if (!opterr)
return; /* without printing */
fprintf(stderr, "%s: %s: %c\n",
((NULL != progname) ? progname : "getopt"), pch, optopt);
}
int
getopt(int argc, char *argv[], char *ostr)
{
static char *place = EMSG; /* option letter processing */
char *oli; /* option letter list index */
progname = argv[0];
if (!*place)
{ /* update scanning pointer */
if (optind >= argc ||
(*(place = argv[optind]) != '-' &&
*(place = argv[optind]) != '/') ||
!*++place)
{
return EOF;
}
if (*place == '-')
{ /* found "--"; ignore; (end of options) */
++optind;
return EOF;
}
}
/* option letter okay? */
optopt = (int)*place;
++place;
oli = strchr(ostr, optopt);
if ((optopt == (int)':') ||
!(oli = strchr(ostr, optopt)))
{
if (!*place)
++optind;
error("illegal option");
return BADCH;
}
if (*++oli != ':') /* Check for argument after option */
{ /* don't need argument */
optarg = NULL;
if (!*place)
++optind;
}
else
{ /* need an argument */
if (*place)
optarg = place; /* no white space */
else
if (argc <= ++optind)
{ /* no arg */
place = EMSG;
error("option requires an argument");
return BADCH;
}
else
optarg = argv[optind]; /* white space */
place = EMSG;
++optind;
}
return optopt; /* return option letter */
}
/* vi: set sw=4 ts=4 sts=4 et :iv */

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source/helper.c Executable file
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source/inc/ata.h Executable file
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/***************************************************************************
* *
* Copyright 2003 LSI Logic Corporation. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Logic. The *
* receipt of or possession of this file does not convey any rights to *
* reproduce or disclose its contents or to manufacture, use, or sell *
* anything it may describe, in whole, or in part, without the specific *
* written consent of LSI Logic Corporation. *
* *
***************************************************************************
*
* Name: ATA.H
* Title: ATA and SATA Device structures and definitions
* Programmer: ----------------
* Creation Date: February 26, 2002
*
* Version History
* ---------------
*
* Last Updated
* -------------
* Version %version: 24 %
* Date Updated %date_modified: %
* Programmer %created_by: mfry %
*
* Date Who Description
* -------- --- -------------------------------------------------------
* 02/26/02 GWK Initial version
* 01/24/03 GWK Updated for SAS 1064
* 08/20/08 KAM updated for SDM big endian platform and gcc bitfields
*
*
* Description
* ------------
* This include file contains generic ATA and SATA structures and definitions.
*
*-------------------------------------------------------------------------
*/
/* If this header file has not been included yet */
#ifndef ATA_H_SOURCE
#define ATA_H_SOURCE
/* Status Register Bit Definitions */
#define ATA_STATUS_ERR (0x01)
#define ATA_STATUS_DRQ (0x08)
#define ATA_STATUS_CMD_DEP (0x10)
#define ATA_STATUS_DF (0x20)
#define ATA_STATUS_DRDY (0x40)
#define ATA_STATUS_BSY (0x80)
#define ATA_STATUS_ERR_DF (ATA_STATUS_ERR | ATA_STATUS_DF)
/* Atapi Status Register Bit Definitions */
#define ATAPI_STATUS_CHK (0x01)
#define ATAPI_STATUS_DRQ (0x08)
#define ATAPI_STATUS_SERV (0x10)
#define ATAPI_STATUS_DMRD (0x20)
#define ATAPI_STATUS_DRDY (0x40)
#define ATAPI_STATUS_BSY (0x80)
/* Atapi Interrupt Reason Register Bit Definitions */
#define ATAPI_INTERRUPT_REASON_CD (0x01)
#define ATAPI_INTERRUPT_REASON_IO (0x02)
#define ATAPI_INTERRUPT_REASON_REL (0x04)
#define ATAPI_INTERRUPT_REASON_TAG_SHIFT (3)
#define ATAPI_INTERRUPT_REASON_TAG_MASK (0xF8)
/* Error Register Bit Definitions */
#define ATA_ERR_ICRC (0x80) /* ultra DMA CRC */
#define ATA_ERR_UNC (0x40) /* uncorrectable error */
#define ATA_ERR_WP (0x40) /* write-protect bit */
#define ATA_ERR_MC (0x20) /* media changed */
#define ATA_ERR_IDNF (0x10) /* id not found */
#define ATA_ERR_MCR (0x08) /* media change requested */
#define ATA_ERR_ABRT (0x04) /* aborted command */
#define ATA_ERR_NM (0x02) /* no media present */
/* Atapi Error Register Bit Definitions */
#define ATAPI_ERR_ILI (0x01)
#define ATAPI_ERR_EOM (0x02)
#define ATAPI_ERR_ABRT (0x04)
#define ATAPI_ERR_SENSE_KEY_SHIFT (3)
#define ATAPI_ERR_SENSE_KEY_TAG_MASK (0xF8)
/* Device & Device/Head Register Bit Definitions */
#define ATA_DEVICE_LBA (0x40)
/* Device Control Register Bit Definitions */
#define ATA_DEVICE_CONTROL_SRST (0x04)
#define ATA_DEVICE_CONTROL_NIEN (0x02)
/*
* define the ATA command set
*/
#define ATA_CMD_CHECK_POWER_MODE 0xE5
#define ATA_CMD_DEVICE_CONFIGURATION 0xB1
#define ATA_CMD_DOWNLOAD_MICROCODE 0x92
#define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
#define ATA_CMD_FLUSH_CACHE 0xE7
#define ATA_CMD_FLUSH_CACHE_EXT 0xEA
#define ATA_CMD_GET_MEDIA_STATUS 0xDA
#define ATA_CMD_IDENTIFY_DEVICE 0xEC
#define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xA1
#define ATA_CMD_IDLE 0xE3
#define ATA_CMD_IDLE_IMMEDIATE 0xE1
#define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
#define ATA_CMD_MEDIA_EJECT 0xED
#define ATA_CMD_MEDIA_LOCK 0xDE
#define ATA_CMD_MEDIA_UNLOCK 0xDF
#define ATA_CMD_NATIVE_MAX_ADDRESS 0xF8
#define ATA_CMD_NATIVE_MAX_ADDRESS_EXT 0x27
#define ATA_CMD_NOP 0x00
#define ATA_CMD_PACKET 0xA0
#define ATA_CMD_READ_BUFFER 0xE4
#define ATA_CMD_READ_DMA 0xC8
#define ATA_CMD_READ_DMA_EXT 0x25
#define ATA_CMD_READ_DMA_QUEUED 0xC7
#define ATA_CMD_READ_DMA_QUEUED_EXT 0x26
#define ATA_CMD_READ_FPDMA_QUEUED 0x60
#define ATA_CMD_READ_MULTIPLE 0xC4
#define ATA_CMD_READ_MULTIPLE_EXT 0x29
#define ATA_CMD_READ_LOG_EXT 0x2F
#define ATA_CMD_READ_SECTORS 0x20
#define ATA_CMD_READ_SECTORS_EXT 0x24
#define ATA_CMD_READ_LONG 0x22 /* Obsoleted in ATA-4 */
#define ATA_CMD_READ_VERIFY_SECTORS 0x40
#define ATA_CMD_READ_VERIFY_SECTORS_EXT 0x42
#define ATA_CMD_SECURITY_DISABLE_PASSWORD 0xF6
#define ATA_CMD_SECURITY_ERASE_PREPARE 0xF3
#define ATA_CMD_SECURITY_ERASE_UNIT 0xF4
#define ATA_CMD_SECURITY_FREEZE_LOCK 0xF5
#define ATA_CMD_SECURITY_SET_PASSWORD 0xF1
#define ATA_CMD_SECURITY_UNLOCK 0xF2
#define ATA_CMD_SEEK 0x70
#define ATA_CMD_SET_FEATURES 0xEF
#define ATA_CMD_SET_MAX 0xF9
#define ATA_CMD_SET_MAX_EXT 0x37
#define ATA_CMD_SET_MULTIPLE_MODE 0xC6
#define ATA_CMD_SLEEP 0xE6
#define ATA_CMD_SMART 0xB0
#define ATA_CMD_SMART_READ_DATA 0xD0
#define ATA_CMD_SMART_ENABLE_DISABLE_AUTOSAVE 0xD2
#define ATA_CMD_SMART_SAVE_ATTRIBUTE_VALUES 0xD3
#define ATA_CMD_SMART_EXECUTE_OFFLINE_IMMEDIATE 0xD4
#define ATA_CMD_SMART_READ_LOG 0xD5
#define ATA_CMD_SMART_WRITE_LOG 0xD6
#define ATA_CMD_SMART_ENABLE_OPERATIONS 0xD8
#define ATA_CMD_SMART_DISABLE_OPERATIONS 0xD9
#define ATA_CMD_SMART_RETURN_STATUS 0xDA
#define ATA_CMD_STANDBY 0xE2
#define ATA_CMD_STANDBY_IMMEDIATE 0xE0
#define ATA_CMD_WRITE_BUFFER 0xE8
#define ATA_CMD_WRITE_DMA 0xCA
#define ATA_CMD_WRITE_DMA_EXT 0x35
#define ATA_CMD_WRITE_DMA_QUEUED 0xCC
#define ATA_CMD_WRITE_DMA_QUEUED_EXT 0x36
#define ATA_CMD_WRITE_FPDMA_QUEUED 0x61
#define ATA_CMD_WRITE_MULTIPLE 0xC5
#define ATA_CMD_WRITE_MULTIPLE_EXT 0x39
#define ATA_CMD_WRITE_SECTORS 0x30
#define ATA_CMD_WRITE_SECTORS_EXT 0x34
#define ATA_CMD_WRITE_LONG 0x32 /* Obsoleted in ATA-4 */
/*
* define SET_FEATURES sub-commands
*/
#define ATA_CMD_SF_SET_TRANSFER_MODE 0x03
#define ATA_CMD_SF_WRITE_CACHE_ENABLE 0x02
#define ATA_CMD_SF_WRITE_CACHE_DISABLE 0x82
#define ATA_CMD_SF_ENABLE_READ_LOOK_AHEAD 0xAA
#define ATA_CMD_SF_DISABLE_READ_LOOK_AHEAD 0x55
#define ATA_CMD_SF_ENABLE_REVERT_PWR_ON_DFLTS 0xCC
#define ATA_CMD_SF_DISABLE_REVERT_PWR_ON_DFLTS 0x66
#define ATA_CMD_SF_ENABLE_SATA_FEATURE 0x10
#define ATA_CMD_SF_DISABLE_SATA_FEATURE 0x90
#define SATA_CMD_SF_NON_ZERO_BUFF_OFST_IN_DMA_SETUP_FIS 0x01
#define SATA_CMD_SF_DMA_SETUP_FIS_AUTO_ACTV_OPTIMIZATION 0x02
#define SATA_CMD_SF_GUARANTEED_IN_ORDER_DATA_DELIVERY 0x04
#define SATA_CMD_SF_ASYNC_NOTIFICATION 0x05
#define SATA_CMD_SF_SOFTWARE_SETTINGS_PRESERVATION 0x06
/* Transfer mode settings for SET_FEATURES command */
#define PIO_DEFAULT 0x0
#define PIO_MODE3 0xB
#define PIO_MODE4 0xC
#define MDMA_MODE0 0x20
#define MDMA_MODE1 0x21
#define MDMA_MODE2 0x22
#define UDMA_MODE0 0x40
#define UDMA_MODE1 0x41
#define UDMA_MODE2 0x42
#define UDMA_MODE3 0x43
#define UDMA_MODE4 0x44
#define UDMA_MODE5 0x45
#define UDMA_MODE6 0x46
/* Error register definitions for the EXECUTE DEVICE DIAGNOSTIC command */
#define ATA_ERROR_DIAGNOSTIC_CODE_DEVICE0_PASSED 0x01
/* These signatures are left in the task file registers after an
* EXECUTE DEVICE DIAGNOSTIC command, and at a few other times
*/
#define COMMAND_BLOCK_SIGNATURE_ATAPI (0x00EB1401)
#define SECTOR_COUNT_SIGNATURE_ATAPI (0x01)
#define COMMAND_BLOCK_SIGNATURE_ATA (0x00000001)
#define SECTOR_COUNT_SIGNATURE_ATA (0x01)
/* CHECK POWER MODE results in Sector Count register */
#define ATA_CHECK_POWER_MODE_STANDBY (0x00)
#define ATA_CHECK_POWER_MODE_IDLE (0x80)
#define ATA_CHECK_POWER_MODE_ACTIVE_OR_IDLE (0xFF)
/* DOWNLOAD MICROCODE SUB COMMANDS */
#define ATA_DNLD_MIC_CODE_IMMED_TEMP (0x01)
#define ATA_DNLD_MIC_CODE_IMMED_FUTURE (0x07)
/*
* define typical IDE timeout values
*
* GES 02/09/01: These values will need some tweaking!!
*/
#define ATA_TIMEOUT_GEN 30 /* generic timeout is 30 seconds */
#define ATA_TIMEOUT_IDENTIFY 2 /* timeout for IDENTIFY commands */
#define ATA_TIMEOUT_READ_BUFFER 2 /* timeout for read buffer */
#define ATA_TIMEOUT_DIAG 5 /* timeout for diagnostics command */
#define ATA_TIMEOUT_STANDBY_IDLE 30 /* timeout for start/stop unit commands */
#define ATA_TIMEOUT_FLUSH_CACHE 30 /* cache flush timeout */
#define ATA_TIMEOUT_CHECK_POWER 2 /* timeout for CHECK POWER MODE */
#define ATA_TIMEOUT_DOWNLOAD_MICROCODE 120 /* wait up to 2 minute */
/*
* define the IDENTIFY DEVICE structure
*/
typedef struct _ATA_IDENTIFY_DEVICE_DATA
{
U16 GeneralConfiguration; /* 0 */
U16 LogicalCylinders; /* 1 */
U16 SpecificConfiguration; /* 2 */
U16 LogicalHeads; /* 3 */
U16 Retired4to5[2]; /* 4-5 */
U16 LogicalSectorsPerLogicalTrack; /* 6 */
U16 Reserved7to8[2]; /* 7-8 */
U16 Retired3; /* 9 */
U16 SerialNumber[10]; /* 10-19 */
U16 Retired20to21[2]; /* 20-21 */
U16 Obsolete22; /* 22 */
U16 FirmwareRevision[4]; /* 23-26 */
U16 ModelNumber[20]; /* 27-46*/
U16 MaxMultipleSize; /* 47 */
U16 Reserved48; /* 48 */
U16 Capabilities[2]; /* 49-50 */
U16 Obsolete51to52[2]; /* 51-52 */
U16 ValidWords; /* 53 */
U16 CurrentLogicalCylinders; /* 54 */
U16 CurrentLogicalHeads; /* 55 */
U16 CurrentLogicalSectorsPerTrack; /* 56 */
U16 CurrentCapacityInSectors[2]; /* 57-58 */
U16 CurrentMultipleSize; /* 59 */
U16 TotalUserSectors[2]; /* 60-61 */
U16 Obsolete62; /* 62 */
U16 MultiwordDmaMode; /* 63 */
U16 PioModesSupported; /* 64 */
U16 MinimumMultiwordDmaTransferCycleTime; /* 65 */
U16 ManufacturerRecommendedMultiwordDmaTransferCycleTime; /* 66 */
U16 MinumumPioTransferCycleTimeWithoutFlowControl; /* 67 */
U16 MinumumPioTransferCycleTimeWithFlowControl; /* 68 */
U16 Reserved69to70[2]; /* 69-70 */
U16 Reserved71to74[4]; /* 71-74 */
U16 QueueDepth; /* 75 */
U16 SerialATACapabilities; /* 76 */
U16 Reserved77; /* 77 */
U16 SerialFeaturesSupported[2]; /* 78-79 */
U16 MajorVersionNumber; /* 80 */
U16 MinorVersionNumber; /* 81 */
U16 CommandSetsSupported[3]; /* 82-84 */
U16 CommandSetsEnabled[2]; /* 85-86 */
U16 CommandSetDefaults; /* 87 */
U16 UltraDmaModes; /* 88 */
U16 TimeForSecurityErase; /* 89 */
U16 TimeForEnahncedSecurityErase; /* 90 */
U16 CurrentAdvancedPowerManagementValue; /* 91 */
U16 MasterPasswordRevisionCode; /* 92 */
U16 HardwareResetResult; /* 93 */
U16 AcousticManagement; /* 94 */ /* GWK Reserved in ATA-5 */
U16 Reserved95to99[5]; /* 95-99 */
U16 MaximumLBAfor48bitAddressing[4]; /* 100-103 */ /* GWK Reserved in ATA-5 */
U16 Reserved104to107[4]; /* 104-107 */
U16 WorldWideName[4]; /* 108-111 */
U16 Reserved112to126[15]; /* 112-126 */
U16 RemovableMediaStatusNotification; /* 127 */
U16 SecurityStatus; /* 128 */
U16 VendorSpecific[31]; /* 129-159 */
U16 CFApowerMode; /* 160 */
U16 Reserved161to175[15]; /* 161-175 */
U16 Reserves176to254[79]; /* 176-254 */
U16 IntegrityWord; /* 255 */
} ATA_IDENTIFY_DEVICE_DATA, *PTR_ATA_IDENTIFY_DEVICE_DATA;
#define ATA_IDENTIFY_DATA_FIRMWARE_REVISION_LENGTH_IN_BYTES 8
#define ATA_IDENTIFY_DATA_MODEL_NUMBER_LENGTH_IN_BYTES 40
#define ATA_IDENTIFY_DATA_SERIAL_NUMBER_LENGTH_IN_BYTES 20
#define ATA_IDENTIFY_DATA_MAJOR_VERSION_ATA_ATAPI_7 (0x0080)
#define ATA_IDENTIFY_DATA_MAJOR_VERSION_ATA_ATAPI_8 (0x0100)
#define ATA_IDENTIFY_DATA_COMMAND_SET_DEFAULT_WWN (0x0100)
#define ATA_IDENTIFY_DATA_WRITE_CACHE_ENABLED (0x0020)
#define ATA_IDENTIFY_DATA_LOOK_AHEAD_ENABLED (0x0040)
#define ATA_IDENTIFY_DATA_SMART_FEATURE_ENABLED (0x0001)
#define ATA_IDENTIFY_DATA_SATA_SUP_FEAT_SFT_SET_PRES (0x0040)
/*
* define the IDENTIFY PACKET DEVICE structure for ATAPI
*/
typedef struct _ATA_IDENTIFY_PACKET_DEVICE_DATA
{
U16 GeneralConfiguration; /* 0 */
U16 Reserved01; /* 1 */
U16 UniqueConfiguration; /* 2 */
U16 Reserved03to09[7]; /* 3-9 */
U16 SerialNumber[10]; /* 10-19 */
U16 Retired20to22[3]; /* 20-22 */
U16 FirmwareRevision[4]; /* 23-26 */
U16 ModelNumber[20]; /* 27-46*/
U16 Reserved47to48[2]; /* 47-48 */
U16 Capabilities[2]; /* 49-50 */
U16 Obsolete51to52[2]; /* 51-52 */
U16 ValidWords; /* 53 */
U16 Reserved54to62[9]; /* 54-62 */
U16 MultiwordDmaMode; /* 63 */
U16 PioModesSupported; /* 64 */
U16 MinimumMultiwordDmaTransferCycleTime; /* 65 */
U16 ManufacturerRecommendedMultiwordDmaTransferCycleTime; /* 66 */
U16 MinumumPioTransferCycleTimeWithoutFlowControl; /* 67 */
U16 MinumumPioTransferCycleTimeWithFlowControl; /* 68 */
U16 Reserved69to70[2]; /* 69-70 */
U16 TypicalTimePacketCmdToBusRelease; /* 71 */
U16 TypicalTimeServiceToBSYCleared; /* 72 */
U16 Reserved73to74[2]; /* 73-74 */
U16 QueueDepth; /* 75 */
U16 SerialATACapabilities; /* 76 */
U16 Reserved77to79[3]; /* 77-79 */
U16 MajorVersionNumber; /* 80 */
U16 MinorVersionNumber; /* 81 */
U16 CommandSetsSupported[3]; /* 82-84 */
U16 CommandSetsEnabled[2]; /* 85-86 */
U16 CommandSetDefaults; /* 87 */
U16 UltraDmaModes; /* 88 */
U16 Reserved89to92[4]; /* 89-92 */
U16 HardwareResetResult; /* 93 */
U16 AcousticManagement; /* 94 */ /* GWK Reserved in ATA-5 */
U16 Reserved95to124[30]; /* 95-124 */
U16 AtapeByteCount0Behavior; /* 125 */
U16 Obsolete126; /* 126 */
U16 RemovableMediaStatusNotification; /* 127 */
U16 SecurityStatus; /* 128 */
U16 VendorSpecific129to159[31]; /* 129-159 */
U16 ReservedForCFA160to175[16]; /* 160-175 */
U16 Reserved176to254[79]; /* 176-254 */
U16 IntegrityWord; /* 255 */
} ATA_IDENTIFY_PACKET_DEVICE_DATA, *PTR_ATA_IDENTIFY_PACKET_DEVICE_DATA;
#define ATA_IDENTIFY_PACKET_DATA_FIRMWARE_REVISION_LENGTH_IN_BYTES 8
#define ATA_IDENTIFY_PACKET_DATA_MODEL_NUMBER_LENGTH_IN_BYTES 40
#define ATA_IDENTIFY_PACKET_DATA_SERIAL_NUMBER_LENGTH_IN_BYTES 20
/******************************************************************************/
/* */
/* S A T A S P E C I F I C D E F I N I T I O N S */
/* */
/******************************************************************************/
/* FIS Types */
#define FIS_TYPE_REGISTER_HOST_TO_DEVICE 0x27
#define FIS_TYPE_REGISTER_DEVICE_TO_HOST 0x34
#define FIS_TYPE_SET_DEVICE_BITS_DEVICE_TO_HOST 0xA1
#define FIS_TYPE_DMA_ACTIVATE_DEVICE_TO_HOST 0x39
#define FIS_TYPE_DMA_SETUP_BIDIRECTIONAL 0x41
#define FIS_TYPE_BIST_ACTIVATE_BIDIRECTIONAL 0x58
#define FIS_TYPE_PIO_SETUP_DEVICE_TO_HOST 0x5F
#define FIS_TYPE_DATA_BIDIRECTIONAL 0x46
/* FIS Command/Control Bit Definitions */
#define FIS_COMMAND_CONTROL_COMMAND 0x1
#define FIS_COMMAND_CONTROL_CONTROL 0x0
/* FIS Interrupt Bit Definitions */
#define FIS_INTERRUPT_TRUE 0x1
#define FIS_INTERRUPT_FALSE 0x0
/* FIS Direction Bit Definitions */
#define FIS_DIRECTION_TRANSMITTER_TO_RECEIVER 0x1
#define FIS_DIRECTION_RECEIVER_TO_TRANSMITTER 0x0
/*
* This is the mapping of how the various fields in the host to device FIS are used
* for CHS, LBA28-bit,and LBA48-bit modes. Use the union on the register FIS
* types to select.
*
*
* CHS LBA28 LBAEXP48
* --- ----- --------
* 0x00 U8 FISType; U8 FISType; U8 FISType;
* 0x01 U32 Reserved01Bits0to6 :7; U32 Reserved01Bits0to6 :7; U32 Reserved01Bits0to6 :7;
* U32 CommandBit :1; U32 CommandBit :1; U32 CommandBit :1;
* 0x02 U8 Command; U8 Command; U8 Command;
* 0x03 U8 Features; U8 Features; U8 Features;
* 0x04 U8 SectorNumber; U8 LBALow_0_7; U8 LBALow_0_7;
* 0x05 U8 CylLow; U8 LBAMid_8_15; U8 LBAMid_8_15;
* 0x06 U8 CylHigh; U8 LBAHigh_16_23; U8 LBAHigh_16_23;
* 0x07 U8 DeviceHead; U8 DeviceAndLBA24_27; U8 Device;
* 0x08 U8 SectorNumberExp; U8 SectorNumberExp; U8 LBALowExp_24_31;
* 0x09 U8 CylLowExp; U8 CylLowExp; U8 LBAMidExp_32_39;
* 0x0A U8 CylHighExp; U8 CylHighExp; U8 LBAHighExp_40_47;
* 0x0B U8 FeaturesExp; U8 FeaturesExp; U8 FeaturesExp;
* 0x0C U8 SectorCount; U8 SectorCount; U8 SectorCount0_7;
* 0x0D U8 SectorCountExp; U8 SectorCountExp; U8 SectorCountExp8_15;
* 0x0E U8 Reserved0E; U8 Reserved0E; U8 Reserved0E;
* 0x0F U8 Control; U8 Control; U8 Control;
* 0x10 U32 Reserved10to14; U32 Reserved10to14; U32 Reserved10to14;
*/
/*
* SATA Register - Host To Device FIS for CHS addressing
*/
typedef struct _REGISTER_HOST_TO_DEVICE_FIS_CHS
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 CommandBit :1; /* 0x01 */
U8 Reserved01Bits0to6 :7;
#else /* little endian */
U8 Reserved01Bits0to6 :7; /* 0x01 */
U8 CommandBit :1;
#endif
U8 Command; /* 0x02 */
U8 Features; /* 0x03 */
U8 SectorNumber; /* 0x04 */
U8 CylLow; /* 0x05 */
U8 CylHigh; /* 0x06 */
U8 DeviceHead; /* 0x07 */
U8 SectorNumberExp; /* 0x08 */
U8 CylLowExp; /* 0x09 */
U8 CylHighExp; /* 0x0A */
U8 FeaturesExp; /* 0x0B */
U8 SectorCount; /* 0x0C */
U8 SectorCountExp; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Control; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_HOST_TO_DEVICE_FIS_CHS, *PTR_REGISTER_HOST_TO_DEVICE_FIS_CHS;
/*
* SATA Register - Host To Device FIS for LBA 28-bit addressing
*/
typedef struct _REGISTER_HOST_TO_DEVICE_FIS_LBA28
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 CommandBit :1; /* 0x01 */
U8 Reserved01Bits0to6 :7;
#else /* little endian */
U8 Reserved01Bits0to6 :7; /* 0x01 */
U8 CommandBit :1;
#endif
U8 Command; /* 0x02 */
U8 Features; /* 0x03 */
U8 LBALow_0_7; /* 0x04 */
U8 LBAMid_8_15; /* 0x05 */
U8 LBAHigh_16_23; /* 0x06 */
U8 DeviceAndLBA24_27; /* 0x07 */
U8 SectorNumberExp; /* 0x08 */
U8 CylLowExp; /* 0x09 */
U8 CylHighExp; /* 0x0A */
U8 FeaturesExp; /* 0x0B */
U8 SectorCount; /* 0x0C */
U8 SectorCountExp; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Control; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_HOST_TO_DEVICE_FIS_LBA28, *PTR_REGISTER_HOST_TO_DEVICE_FIS_LBA28;
/*
* SATA Register - Host To Device FIS for LBA 48-bit addressing
*/
typedef struct _REGISTER_HOST_TO_DEVICE_FIS_LBA48
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 CommandBit :1; /* 0x01 */
U8 Reserved01Bits0to6 :7;
#else /* little endian */
U8 Reserved01Bits0to6 :7; /* 0x01 */
U8 CommandBit :1;
#endif
U8 Command; /* 0x02 */
U8 Features; /* 0x03 */
U8 LBALow_0_7; /* 0x04 */
U8 LBAMid_8_15; /* 0x05 */
U8 LBAHigh_16_23; /* 0x06 */
U8 Device; /* 0x07 */
U8 LBALowExp_24_31; /* 0x08 */
U8 LBAMidExp_32_39; /* 0x09 */
U8 LBAHighExp_40_47; /* 0x0A */
U8 FeaturesExp; /* 0x0B */
U8 SectorCount0_7; /* 0x0C */
U8 SectorCountExp8_15; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Control; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_HOST_TO_DEVICE_FIS_LBA48, *PTR_REGISTER_HOST_TO_DEVICE_FIS_LBA48;
/*
* SATA Register - Host To Device FIS for Packet (ATAPI) Commands
*/
typedef struct REGISTER_HOST_TO_DEVICE_FIS_PACKET
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 CommandBit :1; /* 0x01 */
U8 Reserved01Bits0to6 :7;
#else /* little endian */
U8 Reserved01Bits0to6 :7; /* 0x01 */
U8 CommandBit :1;
#endif
U8 Command; /* 0x02 */
U8 Features; /* 0x03 */
U8 LBALow_0_7; /* 0x04 */
U8 ByteCountLow; /* 0x05 */
U8 ByteCountHigh; /* 0x06 */
U8 DeviceSelect; /* 0x07 */
U8 LBALowExp_24_31; /* 0x08 */
U8 LBAMidExp_32_39; /* 0x09 */
U8 LBAHighExp_40_47; /* 0x0A */
U8 FeaturesExp; /* 0x0B */
U8 SectorCount0_7; /* 0x0C */
U8 SectorCountExp8_15; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Control; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_HOST_TO_DEVICE_FIS_PACKET, *PTR_REGISTER_HOST_TO_DEVICE_FIS_PACKET;
/*
* SATA Register - Host To Device FIS
*/
typedef union _REGISTER_HOST_TO_DEVICE_FIS
{
REGISTER_HOST_TO_DEVICE_FIS_CHS Chs;
REGISTER_HOST_TO_DEVICE_FIS_LBA28 Lba28;
REGISTER_HOST_TO_DEVICE_FIS_LBA48 Lba48;
REGISTER_HOST_TO_DEVICE_FIS_PACKET Packet;
} REGISTER_HOST_TO_DEVICE_FIS, *PTR_REGISTER_HOST_TO_DEVICE_FIS;
/*
* SATA Register - Device To Host FIS for Chs addressing
*/
typedef struct _REGISTER_DEVICE_TO_HOST_FIS_CHS
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 Reserved01Bit7 :1; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bits0to5 :6;
#else /* little endian */
U8 Reserved01Bits0to5 :6; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bit7 :1;
#endif
U8 Status; /* 0x02 */
U8 Error; /* 0x03 */
U8 SectorNumber; /* 0x04 */
U8 CylLow; /* 0x05 */
U8 CylHigh; /* 0x06 */
U8 DeviceHead; /* 0x07 */
U8 SectorNumberExp; /* 0x08 */
U8 CylLowExp; /* 0x09 */
U8 CylHighExp; /* 0x0A */
U8 Reserved0B; /* 0x0B */
U8 SectorCount; /* 0x0C */
U8 SectorCountExp; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Reseved0F; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_DEVICE_TO_HOST_FIS_CHS, *PTR_REGISTER_DEVICE_TO_HOST_FIS_CHS;
/*
* SATA Register - Device To Host FIS for LBA 28-bit
*/
typedef struct _REGISTER_DEVICE_TO_HOST_FIS_LBA28
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 Reserved01Bit7 :1; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bits0to5 :6;
#else /* little endian */
U8 Reserved01Bits0to5 :6; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bit7 :1;
#endif
U8 Status; /* 0x02 */
U8 Error; /* 0x03 */
U8 LBALow_0_7; /* 0x04 */
U8 LBAMid_8_15; /* 0x05 */
U8 LBAHigh_16_23; /* 0x06 */
U8 DeviceAndLBA24_27; /* 0x07 */
U8 SectorNumberExp; /* 0x08 */
U8 CylLowExp; /* 0x09 */
U8 CylHighExp; /* 0x0A */
U8 Reserved0B; /* 0x0B */
U8 SectorCount; /* 0x0C */
U8 SectorCountExp; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Reseved0F; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_DEVICE_TO_HOST_FIS_LBA28, *PTR_REGISTER_DEVICE_TO_HOST_FIS_LBA28;
/*
* SATA Register - Device To Host FIS for LBA 48-bit
*/
typedef struct _REGISTER_DEVICE_TO_HOST_FIS_LBA48
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 Reserved01Bit7 :1; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bits0to5 :6;
#else /* little endian */
U8 Reserved01Bits0to5 :6; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bit7 :1;
#endif
U8 Status; /* 0x02 */
U8 Error; /* 0x03 */
U8 LBALow_0_7; /* 0x04 */
U8 LBAMid_8_15; /* 0x05 */
U8 LBAHigh_16_23; /* 0x06 */
U8 Device; /* 0x07 */
U8 LBALowExp_24_31; /* 0x08 */
U8 LBAMidExp_32_39; /* 0x09 */
U8 LBAHighExp_40_47; /* 0x0A */
U8 Reserved0B; /* 0x0B */
U8 SectorCount0_7; /* 0x0C */
U8 SectorCountExp8_15; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Reseved0F; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_DEVICE_TO_HOST_FIS_LBA48, *PTR_REGISTER_DEVICE_TO_HOST_FIS_LBA48;
/*
* SATA Register - Device To Host FIS for Packet (ATAPI) Commands
*/
typedef struct _REGISTER_DEVICE_TO_HOST_FIS_PACKET
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 Reserved01Bit7 :1; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bits0to5 :6;
#else /* little endian */
U8 Reserved01Bits0to5 :6; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bit7 :1;
#endif
U8 AtapiStatus; /* 0x02 */
U8 Error; /* 0x03 */
U8 LBALow_0_7; /* 0x04 */
U8 ByteCountLow; /* 0x05 */
U8 ByteCountHigh; /* 0x06 */
U8 DeviceSelect; /* 0x07 */
U8 LBALowExp_24_31; /* 0x08 */
U8 LBAMidExp_32_39; /* 0x09 */
U8 LBAHighExp_40_47; /* 0x0A */
U8 Reserved0B; /* 0x0B */
U8 InterruptReason; /* 0x0C */
U8 SectorCountExp8_15; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 Reseved0F; /* 0x0F */
U32 Reserved10to14; /* 0x10 */
} REGISTER_DEVICE_TO_HOST_FIS_PACKET, *PTR_REGISTER_DEVICE_TO_HOST_FIS_PACKET;
/*
* SATA Register - Device To Host FIS
*/
typedef union _REGISTER_DEVICE_TO_HOST_FIS
{
REGISTER_DEVICE_TO_HOST_FIS_CHS Chs;
REGISTER_DEVICE_TO_HOST_FIS_LBA28 Lba28;
REGISTER_DEVICE_TO_HOST_FIS_LBA48 Lba48;
REGISTER_DEVICE_TO_HOST_FIS_PACKET Packet;
} REGISTER_DEVICE_TO_HOST_FIS, *PTR_REGISTER_DEVICE_TO_HOST_FIS;
/*
* SATA Set Device Bits - Device To Host FIS
*/
typedef struct _SET_DEVICE_BITS_DEVICE_TO_HOST_FIS
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 Notification :1; /* 0x01 */
U8 Interrupt :1;
U8 Reserved01Bits0to5 :6;
U8 Reserved02Bit7 :1; /* 0x02 */
U8 StatusHi :3;
U8 Reserved02Bit3 :1;
U8 StatusLo :3;
#else /* little endian */
U8 Reserved01Bits0to5 :6; /* 0x01 */
U8 Interrupt :1;
U8 Notification :1;
U8 StatusLo :3; /* 0x02 */
U8 Reserved02Bit3 :1;
U8 StatusHi :3;
U8 Reserved02Bit7 :1;
#endif
U8 Error; /* 0x03 */
U32 SActive; /* 0x04 */
} SET_DEVICE_BITS_DEVICE_TO_HOST_FIS, *PTR_SET_DEVICE_BITS_DEVICE_TO_HOST_FIS;
/*
* SATA DMA Activate - Device To Host FIS
*/
typedef struct _DMA_ACTIVATE_DEVICE_TO_HOST_FIS
{
U8 FISType; /* 0x00 */
U8 Reserved01; /* 0x01 */
U8 Reserved02; /* 0x02 */
U8 Reserved03; /* 0x03 */
} DMA_ACTIVATE_DEVICE_TO_HOST_FIS, *PTR_DMA_ACTIVATE_DEVICE_TO_HOST_FIS;
/*
* SATA DMA Setup (Bi-directional) FIS
*/
typedef struct _DMA_SETUP_FIS
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 Reserved01Bit7 :1; /* 0x01 */
U8 Interrupt :1;
U8 Direction :1;
U8 Reserved01Bits0to4 :5;
#else /* little endian */
U8 Reserved01Bits0to4 :5; /* 0x01 */
U8 Direction :1;
U8 Interrupt :1;
U8 Reserved01Bit7 :1;
#endif
U8 Reserved02; /* 0x02 */
U8 Reserved03; /* 0x03 */
U32 DMABufferIdentifierLow; /* 0x04 */
U32 DMABufferIdentifierHigh; /* 0x08 */
U32 Reserved0Cto0F; /* 0x0C */
U32 DMABufferOffset; /* 0x10 */
U32 DMATransferCount; /* 0x14 */
U32 Reserved18; /* 0x18 */
} DMA_SETUP_FIS, *PTR_DMA_SETUP_FIS;
/*
* SATA BIST Activate FIS - I don't believe we suppor this ?
*/
/*
* SATA PIO Setup - Device To Host FIS
*/
typedef struct _PIO_SETUP_DEVICE_TO_HOST_FIS
{
U8 FISType; /* 0x00 */
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 Reserved01Bit7 :1; /* 0x01 */
U8 Interrupt :1;
U8 Direction :1;
U8 Reserved01Bits0to4 :5;
#else /* little endian */
U8 Reserved01Bits0to4 :5; /* 0x01 */
U8 Direction :1;
U8 Interrupt :1;
U8 Reserved01Bit7 :1;
#endif
U8 Status; /* 0x02 */
U8 Error; /* 0x03 */
U8 SectorNumber; /* 0x04 */
U8 CylLow; /* 0x05 */
U8 CylHigh; /* 0x06 */
U8 DeviceHead; /* 0x07 */
U8 SectorNumberExp; /* 0x08 */
U8 CylLowExp; /* 0x09 */
U8 CylHighExp; /* 0x0A */
U8 Reserved0B; /* 0x0B */
U8 SectorCount; /* 0x0C */
U8 SectorCountExp; /* 0x0D */
U8 Reserved0E; /* 0x0E */
U8 E_Status; /* 0x0F */
U16 TransferCount; /* 0x10 */
U16 Reserved12to13; /* 0x12 */
} PIO_SETUP_DEVICE_TO_HOST_FIS, *PTR_PIO_SETUP_DEVICE_TO_HOST_FIS;
/* PIO Setup Direction Bit */
#define PIO_SETUP_DIRECTION_HOST_TO_DEVICE (0)
#define PIO_SETUP_DIRECTION_DEVICE_TO_HOST (1)
/*
* SATA Data - (Bi-directional) FIS
*/
typedef struct _DATA_FIS
{
U8 FISType; /* 0x00 */
U8 Reserved01; /* 0x01 */
U8 Reserved02; /* 0x02 */
U8 Reserved03; /* 0x03 */
U32 Data[1]; /* 0x04 */
/* Note the data is variable in length */
} DATA_FIS, *PTR_DATA_FIS;
/* This is a union of all the SATA FIS's */
typedef union _PL_SATA_FIS_UNION
{
REGISTER_HOST_TO_DEVICE_FIS HtoDFIS;
REGISTER_DEVICE_TO_HOST_FIS DtoHFIS;
SET_DEVICE_BITS_DEVICE_TO_HOST_FIS SetDeviceDtoHFIS;
DMA_ACTIVATE_DEVICE_TO_HOST_FIS DmaActivateDtoHFIS;
DMA_SETUP_FIS DmaSetupFIS;
PIO_SETUP_DEVICE_TO_HOST_FIS PioSetupDtoHFIS;
DATA_FIS DataFIS;
} PL_SATA_FIS_UNION, * PTR_PL_SATA_FIS_UNION;
typedef struct _READ_LOG_EXT_PAGE_10_DATA
{
#if defined( __LSIUTIL_BIG_ENDIAN__ )
U8 NQ :1; /* 0x00 */
U8 Reserved00Bit5to6 :2;
U8 Tag :5;
#else /* little endian */
U8 Tag :5; /* 0x00 */
U8 Reserved00Bit5to6 :2;
U8 NQ :1;
#endif
U8 Reserved01; /* 0x01 */
U8 Status; /* 0x02 */
U8 Error; /* 0x03 */
U8 SectorNumber; /* 0x04 */
U8 CylinderLow; /* 0x05 */
U8 CylinderHigh; /* 0x06 */
U8 DevHead; /* 0x07 */
U8 SectorNumberExp; /* 0x08 */
U8 CylinderLowExp; /* 0x09 */
U8 CylinderHighExp; /* 0x0A */
U8 Reserved11; /* 0x0B */
U8 SectorCount; /* 0x0C */
U8 SectorCountExp; /* 0x0D */
U8 Reserved14to511[1]; /* 0x0E */
} READ_LOG_EXT_PAGE_10_DATA, *PTR_READ_LOG_EXT_PAGE_10_DATA;
#endif /* End of #if ATA_H_SOURCE */

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/*++ BUILD Version: 0004 // Increment this if a change has global effects
Copyright (c) 1992-1999 Microsoft Corporation
Module Name:
devioctl.h
Abstract:
This module contains
Author:
Andre Vachon (andreva) 21-Feb-1992
Revision History:
--*/
// begin_winioctl
#ifndef _DEVIOCTL_
#define _DEVIOCTL_
// begin_ntddk begin_wdm begin_nthal begin_ntifs
//
// Define the various device type values. Note that values used by Microsoft
// Corporation are in the range 0-32767, and 32768-65535 are reserved for use
// by customers.
//
#define DEVICE_TYPE ULONG
#define FILE_DEVICE_BEEP 0x00000001
#define FILE_DEVICE_CD_ROM 0x00000002
#define FILE_DEVICE_CD_ROM_FILE_SYSTEM 0x00000003
#define FILE_DEVICE_CONTROLLER 0x00000004
#define FILE_DEVICE_DATALINK 0x00000005
#define FILE_DEVICE_DFS 0x00000006
#define FILE_DEVICE_DISK 0x00000007
#define FILE_DEVICE_DISK_FILE_SYSTEM 0x00000008
#define FILE_DEVICE_FILE_SYSTEM 0x00000009
#define FILE_DEVICE_INPORT_PORT 0x0000000a
#define FILE_DEVICE_KEYBOARD 0x0000000b
#define FILE_DEVICE_MAILSLOT 0x0000000c
#define FILE_DEVICE_MIDI_IN 0x0000000d
#define FILE_DEVICE_MIDI_OUT 0x0000000e
#define FILE_DEVICE_MOUSE 0x0000000f
#define FILE_DEVICE_MULTI_UNC_PROVIDER 0x00000010
#define FILE_DEVICE_NAMED_PIPE 0x00000011
#define FILE_DEVICE_NETWORK 0x00000012
#define FILE_DEVICE_NETWORK_BROWSER 0x00000013
#define FILE_DEVICE_NETWORK_FILE_SYSTEM 0x00000014
#define FILE_DEVICE_NULL 0x00000015
#define FILE_DEVICE_PARALLEL_PORT 0x00000016
#define FILE_DEVICE_PHYSICAL_NETCARD 0x00000017
#define FILE_DEVICE_PRINTER 0x00000018
#define FILE_DEVICE_SCANNER 0x00000019
#define FILE_DEVICE_SERIAL_MOUSE_PORT 0x0000001a
#define FILE_DEVICE_SERIAL_PORT 0x0000001b
#define FILE_DEVICE_SCREEN 0x0000001c
#define FILE_DEVICE_SOUND 0x0000001d
#define FILE_DEVICE_STREAMS 0x0000001e
#define FILE_DEVICE_TAPE 0x0000001f
#define FILE_DEVICE_TAPE_FILE_SYSTEM 0x00000020
#define FILE_DEVICE_TRANSPORT 0x00000021
#define FILE_DEVICE_UNKNOWN 0x00000022
#define FILE_DEVICE_VIDEO 0x00000023
#define FILE_DEVICE_VIRTUAL_DISK 0x00000024
#define FILE_DEVICE_WAVE_IN 0x00000025
#define FILE_DEVICE_WAVE_OUT 0x00000026
#define FILE_DEVICE_8042_PORT 0x00000027
#define FILE_DEVICE_NETWORK_REDIRECTOR 0x00000028
#define FILE_DEVICE_BATTERY 0x00000029
#define FILE_DEVICE_BUS_EXTENDER 0x0000002a
#define FILE_DEVICE_MODEM 0x0000002b
#define FILE_DEVICE_VDM 0x0000002c
#define FILE_DEVICE_MASS_STORAGE 0x0000002d
#define FILE_DEVICE_SMB 0x0000002e
#define FILE_DEVICE_KS 0x0000002f
#define FILE_DEVICE_CHANGER 0x00000030
#define FILE_DEVICE_SMARTCARD 0x00000031
#define FILE_DEVICE_ACPI 0x00000032
#define FILE_DEVICE_DVD 0x00000033
#define FILE_DEVICE_FULLSCREEN_VIDEO 0x00000034
#define FILE_DEVICE_DFS_FILE_SYSTEM 0x00000035
#define FILE_DEVICE_DFS_VOLUME 0x00000036
#define FILE_DEVICE_SERENUM 0x00000037
#define FILE_DEVICE_TERMSRV 0x00000038
#define FILE_DEVICE_KSEC 0x00000039
#define FILE_DEVICE_FIPS 0x0000003A
//
// Macro definition for defining IOCTL and FSCTL function control codes. Note
// that function codes 0-2047 are reserved for Microsoft Corporation, and
// 2048-4095 are reserved for customers.
//
#define CTL_CODE( DeviceType, Function, Method, Access ) ( \
((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method) \
)
//
// Macro to extract device type out of the device io control code
//
#define DEVICE_TYPE_FROM_CTL_CODE(ctrlCode) (((ULONG)(ctrlCode & 0xffff0000)) >> 16)
//
// Define the method codes for how buffers are passed for I/O and FS controls
//
#define METHOD_BUFFERED 0
#define METHOD_IN_DIRECT 1
#define METHOD_OUT_DIRECT 2
#define METHOD_NEITHER 3
//
// Define the access check value for any access
//
//
// The FILE_READ_ACCESS and FILE_WRITE_ACCESS constants are also defined in
// ntioapi.h as FILE_READ_DATA and FILE_WRITE_DATA. The values for these
// constants *MUST* always be in sync.
//
//
// FILE_SPECIAL_ACCESS is checked by the NT I/O system the same as FILE_ANY_ACCESS.
// The file systems, however, may add additional access checks for I/O and FS controls
// that use this value.
//
#define FILE_ANY_ACCESS 0
#define FILE_SPECIAL_ACCESS (FILE_ANY_ACCESS)
#define FILE_READ_ACCESS ( 0x0001 ) // file & pipe
#define FILE_WRITE_ACCESS ( 0x0002 ) // file & pipe
// end_ntddk end_wdm end_nthal end_ntifs
#endif // _DEVIOCTL_
// end_winioctl

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#ifndef _DMI_IOCTL_H_
#define _DMI_IOCTL_H_
/***************************************************************************
* *
* Copyright 1998 LSI Logic Corporation. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Logic. The *
* receipt of or possession of this file does not convey any rights to *
* reproduce or disclose its contents or to manufacture, use, or sell *
* anything it may describe, in whole, or in part, without the specific *
* written consent of LSI Logic Corporation. *
* *
***************************************************************************/
/* Name: DMI_IOCTL.H
* Title: Solaris O/S Character mode IOCTL definitions
* Programmer: Russell A. Johnson
* Creation Date: May 26, 1998
*
* Version History
* ---------------
*
* Date Who? Description
* -------- ---- -------------------------------------------------------
#BeginRevision
* 05/17/00 RAJ Added bus mode support for fibre channel devices.
* 12/19/99 RAJ Added new flags for scsi-3 options.
* 11/09/98 RAJ Changed copyright notice to LSI Logic.
#EndRevision
* Version 4.02.01
* 07/22/98 RAJ Added some more data to the DMI data structure. This
* includes the PCI bus number, device number, and function
* number. Also added a major version number for the data
* structure. That version number indicates major changes.
* When it changes then the entire data format may have
* changed. See the comments below for more details.
#EndRevision
* Version 4.00.04
* 05/26/98 RAJ Initial version.
#EndRevision
*
#BeginDescription
*
* This file contains the Solaris 2.6 character mode driver interface
* definitions needed in order to provide IOCTL's for our SCSI HBA driver.
*
#EndDescription
*
*-------------------------------------------------------------------------
*/
/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
* HEADER FILE DEPENDANCIES
*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
*
* This file is dependent on the following files:
*
* SALIOS.H - type defintions UINT8, UINT16, UINT32, UINT64
*/
/* The following data is for our character mode ioctl interface. Per the
* Solaris standard mechanism, we define SYMIOCTL as a unique number in the
* upper 8 bits and a command value in the lower 8 bits.
*/
#define SYMIOCTL ('H' << 8)
#define SYMIOCTL_GET_DMI_DATA (SYMIOCTL | 1)
#define SYMIOCTL_GET_TIMERS (SYMIOCTL | 2)
#define SYMIOCTL_UPDATE_FLASH (SYMIOCTL | 3)
#define SYMIOCTL_RESET_ADAPTER (SYMIOCTL | 4)
#define SYMIOCTL_GET_PROPERTY (SYMIOCTL | 5)
#define SYMIOCTL_PASS_THRU (SYMIOCTL | 6)
#define SYMIOCTL_REG_ACCESS (SYMIOCTL | 7)
#define SYMIOCTL_EVENT_QUERY (SYMIOCTL | 8)
#define SYMIOCTL_EVENT_ENABLE (SYMIOCTL | 9)
#define SYMIOCTL_EVENT_REPORT (SYMIOCTL | 10)
#define SYMIOCTL_GET_PCI_INFO (SYMIOCTL | 11)
#define SYMIOCTL_BTDH_MAPPING (SYMIOCTL | 12)
#define SYMIOCTL_DIAG_ACTION (SYMIOCTL | 13)
#define SYMIOCTL_PASS_THRU_TIMEOUT (SYMIOCTL | 14)
/* The following are our ioctl() return status values. If everything went
* well, we return good status. If the buffer length sent to us is too short
* we return a status to tell the user.
*/
#define SYMIOCTL_STATUS_GOOD 0
#define SYMIOCTL_STATUS_LEN_TOO_SHORT 1
/* The data structures defined in this file are marked with a data structure
* length and data structure version. The length value is the first value in
* the structure and is used to make sure the buffer is large enough for
* communication between the driver and the application. The version number is
* a major version number. If the data structure changes and only has a new
* element appended, then the version number will remain the same but the
* length will increase. If the data structure changes in any other way, such
* as re-arranging all of its elements, then the version number will increase.
*
* The following macro defines the current version number of the data
* structure.
*/
#define SYMHI_DMI_DATA_VERSION 1
/* The following is the SYMIOCTL_GET_DMI_DATA data structure. This data
* structure is setup so that we hopefully are properly aligned for both 32-bit
* and 64-bit mode applications.
*
* StructureLength - This value is the amount of data the caller has allocated
* for the structure when they first call us. After we have filled in the
* structure, this indicates the length our data structure is.
*
* MajorVersion - This value is used by the driver to tell the application what
* version of the data structure is being provided. It only changes if the
* data ordering of the data below is changed.
*
* MinSyncPeriodNs - This is the minimum period in nano-seconds (ns) that we
* will negotiate for on this adapter. The smaller value the faster
* synchronous speed except if this value is zero then asynchronous transfers
* is all we support.
*
* MaxWidth - This value indicates the maximum width this bus can be used as.
* If the PciDeviceId indicates a width capability of 16 devices and this is
* set to 8 devices then the PCI Subsystem ID value has limited our use of this
* adapter to 8 devices. This value also indicates the number of valid
* elements in the DevSpeed[] and DevWidth[] array's.
*
* HostScsiId - This is the host adapter SCSI ID being used by this adapter.
*
* PciBusNumber - The number of the PCI bus this adapter is on. If for some
* reason the driver is unable to determine the bus number, device number, or
* function number, these values will be set to 0xFF.
*
* PciDeviceNumber - The PCI device number for this device.
*
* PciFunctionNumber - The PCI function number for this device.
*
* PciDeviceId - This is the PCI device ID from PCI configuration space for
* this adapter.
*
* PciRevision - This is the PCI revision value from PCI configuration space
* for this adapter.
*
* HwBusMode - This value indicates the mode the bus is currently in. See the
* SYM_HW_BUS_MODE_xx macros.
*
* DevSpeed - This array is indexed by the target ID and indicates the
* currently negotiated synchronous speed in nano-seconds (ns). A value of
* zero ns indicates asynchronous mode.
*
* DevWidth - This array is indexed by the target ID and indicates the
* currently negotiated width in bits. A value of 8 indicates narrow mode, a
* value of 16 indicates wide.
*
* DriverVersion - This is an ascii null-terminated string indicating the
* version of this driver.
*
* DevFlags - This array is indexed by the target ID and indicates the
* currently negotiated options such as DT and async protection capabilities.
*/
#pragma pack(1)
typedef struct _SYMHI_DMI_DATA
{ /* Offset */
UINT32 StructureLength; /* 0x00..0x03 */
UINT32 Reserved1; /* 0x04..0x07 */
UINT32 MajorVersion; /* 0x08..0x0B */
UINT16 MinSyncPeriodNs; /* 0x0C..0x0D */
UINT8 MaxWidth; /* 0x0E */
UINT8 HostScsiId; /* 0x0F */
UINT8 PciBusNumber; /* 0x10 */
UINT8 PciDeviceNumber; /* 0x11 */
UINT8 PciFunctionNumber; /* 0x12 */
UINT8 Reserved2; /* 0x13 */
UINT16 PciDeviceId; /* 0x14..0x15 */
UINT8 PciRevision; /* 0x16 */
UINT8 HwBusMode; /* 0x17 */
UINT8 Reserved3[8]; /* 0x18..0x1F */
#if defined TARGET_MPTx
/* MPI adapters can have many more devices per SCSI bus than non-MPI
* adapters.
*/
UINT16 DevSpeed[256]; /* 0x20..0x21F */
UINT8 DevWidth[256]; /* 0x220..0x31F */
UINT32 DevFlags[256]; /* 0x320..0x71F */
char DriverVersion[80]; /* 0x720..0x76F */
#elif defined TARGET_HIHW || defined TARGET_SRHW
UINT16 DevSpeed[16]; /* 0x20..0x3F */
UINT8 DevWidth[16]; /* 0x40..0x4F */
char DriverVersion[80]; /* 0x50..0x9F */
UINT32 DevFlags[16]; /* 0xA0..0xDF */
#else
#error "Unknown hardware type"
#endif /* defined TARGET_xxx */
} SYMHI_DMI_DATA, * PTR_SYMHI_DMI_DATA;
#pragma pack()
/* The following are definitions for the value of HwBusMode in the
* SYMHI_DMI_DATA data structure.
*
* SYM_HW_BUS_MODE_UNKNOWN - The bus mode is not known yet
* SYM_HW_BUS_MODE_SINGLE - The bus is in single ended mode
* SYM_HW_BUS_MODE_HVD - The bus is in high voltage differential mode
* SYM_HW_BUS_MODE_LVD - The bus is in low voltage differential mode
* SYM_HW_BUS_MODE_FC - The bus is a fibre channel bus
*/
#define SYM_HW_BUS_MODE_UNKNOWN (0x00)
#define SYM_HW_BUS_MODE_SINGLE (0x01)
#define SYM_HW_BUS_MODE_HVD (0x02)
#define SYM_HW_BUS_MODE_LVD (0x03)
#define SYM_HW_BUS_MODE_FC (0x04)
/* The following are definitions for the DevFlags[] array. Each bit is set
* only when the feature is currently in use for the given device.
*
* SYM_DEV_DT - Set when Dual Transfers (ie. dual edge clock in use) enabled
* SYM_DEV_ASYNC_PROT - Set when asynchronous phase protection is enabled
*/
#define SYM_DEV_DT (0x00000001)
#define SYM_DEV_ASYNC_PROT (0x00000002)
#pragma pack(1)
typedef struct _SYM_UPDATE_FLASH
{
UINT64 PtrBuffer;
UINT32 ImageChecksum;
UINT32 ImageOffset;
UINT32 ImageSize;
UINT32 ImageType;
} SYM_UPDATE_FLASH, * PTR_SYM_UPDATE_FLASH;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_GET_PROPERTY
{
UINT64 PtrName;
UINT64 PtrBuffer;
UINT32 NameLen;
UINT32 BufferLen;
UINT32 PropertyLen;
} SYM_GET_PROPERTY, * PTR_SYM_GET_PROPERTY;
#pragma pack()
#define SYM_PASS_THRU_NONE 0
#define SYM_PASS_THRU_READ 1
#define SYM_PASS_THRU_WRITE 2
#define SYM_PASS_THRU_BOTH 3
#pragma pack(1)
typedef struct _SYM_PASS_THRU
{
UINT64 PtrRequest;
UINT64 PtrReply;
UINT64 PtrData;
UINT32 RequestSize;
UINT32 ReplySize;
UINT32 DataSize;
UINT32 DataDirection;
UINT64 PtrDataOut;
UINT32 DataOutSize;
} SYM_PASS_THRU, * PTR_SYM_PASS_THRU;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_PASS_THRU_TIMEOUT
{
UINT64 PtrRequest;
UINT64 PtrReply;
UINT64 PtrData;
UINT32 RequestSize;
UINT32 ReplySize;
UINT32 DataSize;
UINT32 DataDirection;
UINT64 PtrDataOut;
UINT32 DataOutSize;
UINT32 Timeout;
} SYM_PASS_THRU_TIMEOUT, * PTR_SYM_PASS_THRU_TIMEOUT;
#pragma pack()
#define REG_IO_READ 1
#define REG_IO_WRITE 2
#define REG_MEM_READ 3
#define REG_MEM_WRITE 4
#pragma pack(1)
typedef struct _SYM_REG_ACCESS
{
UINT32 Command;
UINT32 RegOffset;
UINT32 RegData;
} SYM_REG_ACCESS, * PTR_SYM_REG_ACCESS;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_EVENT_QUERY
{
UINT32 Entries;
UINT32 Types;
} SYM_EVENT_QUERY, * PTR_SYM_EVENT_QUERY;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_EVENT_ENABLE
{
UINT32 Types;
} SYM_EVENT_ENABLE, * PTR_SYM_EVENT_ENABLE;
#pragma pack()
#if defined TARGET_MPT2
#define EVENT_ENTRY_NUM 48
#else
#define EVENT_ENTRY_NUM 2
#endif
#pragma pack(1)
typedef struct _SYM_EVENT_ENTRY
{
UINT32 Type;
UINT32 Number;
UINT32 Data[EVENT_ENTRY_NUM];
} SYM_EVENT_ENTRY, * PTR_SYM_EVENT_ENTRY;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_EVENT_REPORT
{
UINT32 Size;
SYM_EVENT_ENTRY Events[1];
} SYM_EVENT_REPORT, * PTR_SYM_EVENT_REPORT;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_PCI_INFO
{
UINT32 BusNumber;
UINT8 DeviceNumber;
UINT8 FunctionNumber;
UINT16 InterruptVector;
UINT8 PciHeader[256];
} SYM_PCI_INFO, * PTR_SYM_PCI_INFO;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_BTDH_MAPPING
{
UINT16 TargetID;
UINT16 Bus;
UINT16 DevHandle;
UINT16 Reserved;
} SYM_BTDH_MAPPING, * PTR_SYM_BTDH_MAPPING;
#pragma pack()
#pragma pack(1)
typedef struct _SYM_DIAG_ACTION
{
UINT32 Action;
UINT32 Length;
UINT64 PtrDiagAction;
UINT32 ReturnCode;
} SYM_DIAG_ACTION, * PTR_SYM_DIAG_ACTION;
#pragma pack()
#define FW_DIAGNOSTIC_BUFFER_COUNT (3)
#define FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
#define MPI_FW_DIAG_NEW (0x806E6577)
#define MPI_FW_DIAG_TYPE_REGISTER (0x00000001)
#define MPI_FW_DIAG_TYPE_UNREGISTER (0x00000002)
#define MPI_FW_DIAG_TYPE_QUERY (0x00000003)
#define MPI_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
#define MPI_FW_DIAG_TYPE_RELEASE (0x00000005)
#define MPI_FW_DIAG_INVALID_UID (0x00000000)
#define MPI_FW_DIAG_ERROR_SUCCESS (0x00000000)
#define MPI_FW_DIAG_ERROR_FAILURE (0x00000001)
#define MPI_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
#define MPI_FW_DIAG_ERROR_POST_FAILED (0x00000010)
#define MPI_FW_DIAG_ERROR_INVALID_UID (0x00000011)
#define MPI_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
#define MPI_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
#define MPI_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
#pragma pack(1)
typedef struct _MPI_FW_DIAG_REGISTER
{
UINT8 TraceLevel;
UINT8 BufferType;
UINT16 Flags;
UINT32 ExtendedType;
UINT32 ProductSpecific[4];
UINT32 RequestedBufferSize;
UINT32 UniqueId;
} MPI_FW_DIAG_REGISTER, * PTR_MPI_FW_DIAG_REGISTER;
#pragma pack()
#pragma pack(1)
typedef struct _MPI_FW_DIAG_UNREGISTER
{
UINT32 UniqueId;
} MPI_FW_DIAG_UNREGISTER, * PTR_MPI_FW_DIAG_UNREGISTER;
#pragma pack()
#define MPI_FW_DIAG_FLAG_APP_OWNED (0x0001)
#define MPI_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
#define MPI_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
#pragma pack(1)
typedef struct _MPI_FW_DIAG_QUERY
{
UINT8 TraceLevel;
UINT8 BufferType;
UINT16 Flags;
UINT32 ExtendedType;
UINT32 ProductSpecific[4];
UINT32 TotalBufferSize;
UINT32 DriverAddedBufferSize;
UINT32 UniqueId;
} MPI_FW_DIAG_QUERY, * PTR_MPI_FW_DIAG_QUERY;
#pragma pack()
#pragma pack(1)
typedef struct _MPI_FW_DIAG_RELEASE
{
UINT32 UniqueId;
} MPI_FW_DIAG_RELEASE, * PTR_MPI_FW_DIAG_RELEASE;
#pragma pack()
#define MPI_FW_DIAG_FLAG_REREGISTER (0x0001)
#define MPI_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
#pragma pack(1)
typedef struct _MPI_FW_DIAG_READ_BUFFER
{
UINT8 Status;
UINT8 Reserved;
UINT16 Flags;
UINT32 StartingOffset;
UINT32 BytesToRead;
UINT32 UniqueId;
UINT32 DataBuffer[1];
} MPI_FW_DIAG_READ_BUFFER, * PTR_MPI_FW_DIAG_READ_BUFFER;
#pragma pack()
#endif

32
source/inc/getopt.h Executable file
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/***************************************************************************
* *
* Copyright 2012 LSI Corporation. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Corporation. The *
* receipt of or possession of this file does not convey any rights to *
* reproduce or disclose its contents or to manufacture, use, or sell *
* anything it may describe, in whole, or in part, without the specific *
* written consent of LSI Corporation. *
* *
***************************************************************************
*/
#if !EFI
#include <stdio.h>
#include <stddef.h>
#include <string.h>
#endif
#ifndef _GETOPT_
#define _GETOPT_
int getopt(int argc, char *argv[], char *optstring);
extern char *optarg; /* returned arg to go with this option */
extern int optind; /* index to next argv element to process */
extern int opterr; /* should error messages be printed? */
extern int optopt;
#define BADCH ('?')
#endif /* _GETOPT */

146
source/inc/helper.h Executable file
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/***************************************************************************
* *
* Copyright 2012 LSI Corporation. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Corporation. The *
* receipt of or possession of this file does not convey any rights to *
* reproduce or disclose its contents or to manufacture, use, or sell *
* anything it may describe, in whole, or in part, without the specific *
* written consent of LSI Corporation. *
* *
***************************************************************************
*/
#if EFIEBC
#define EFI_SPECIFICATION_VERSION 0x0001000A
#define TIANO_RELEASE_VERSION 0x00080006
#include "efibind.h"
#include "efitypes.h"
#include "eficommon.h"
#include "efiapi.h"
#include "efierror.h"
#include "efistdarg.h"
#include "efishelllib.h"
#define DevicePathToStr LibDevicePathToStr
#define LibFileInfo LibGetFileInfo
#define GenericFileInfo gEfiFileInfoGuid
#define InitializeShellApplication LibInitializeShellApplication
#define LoadedImageProtocol gEfiLoadedImageProtocolGuid
#define EFIERR_OEM(x) EFIERR(x+1000)
#define EFI_LOADED_IMAGE EFI_LOADED_IMAGE_PROTOCOL
#define EFI_FILE_IO_INTERFACE EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
#define SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID
#define EVT_TIMER EFI_EVENT_TIMER
#define va_start VA_START
#define va_arg VA_ARG
#define va_end VA_END
#define va_list VA_LIST
#else
#include "efi.h"
#include "efilib.h"
#include "efistdarg.h"
#include "shell.h"
#endif
#if EFI32
typedef unsigned int size_t;
#endif
// ctype.h
int isalnum(int c);
int isalpha(int c);
int isascii(int c);
int isblank(int c);
int iscntrl(int c);
int isdigit(int c);
int isgraph(int c);
int islower(int c);
int isprint(int c);
int ispunct(int c);
int isspace(int c);
int isupper(int c);
int isxdigit(int c);
int toupper(int c);
int tolower(int c);
// errno.h
extern int errno;
#define EFAULT 14
#define ENODEV 19
#define EINVAL 22
// fcntl.h
#define O_RDONLY 00
#define O_WRONLY 01
#define O_RDWR 02
#define O_CREAT 0100 /* not fcntl */
#define O_TRUNC 01000 /* not fcntl */
// sttdef.h
#define offsetof(s, m) (size_t)(&(((s *)0)->m))
// stdio.h
#define EOF 0
typedef void * FILE;
#define stdin (void *)1
#define stdout (void *)2
#define stderr (void *)3
int fgetc(FILE *stream);
char *fgets(char *s, int size, FILE *stream);
int getc(FILE *stream);
int getchar(void);
char *gets(char *s);
int ungetc(int c, FILE *stream);
int vsprintf(char *s, const char *format, va_list args);
int printf(const char *format, ...);
int fprintf(FILE *stream, const char *format, ...);
int sprintf(char *str, const char *format, ...);
int scanf(const char *format, ...);
int fscanf(FILE *stream, const char *format, ...);
int sscanf(const char *str, const char *format, ...);
FILE *fopen(const char *path, const char *mode);
int fclose(FILE *stream);
int fputs(const char *s, FILE *stream);
int fputc(int c, FILE *stream);
void perror(const char *s);
int fflush(FILE *stream);
// stdlib.h
void *malloc(size_t size);
void free(void *ptr);
void *realloc(void *ptr, size_t size);
void exit(int status);
int rand(void);
// string.h
void *memset(void *s, int c, size_t n);
void *memcpy(void *dest, const void *src, size_t n);
int memcmp(const void *s1, const void *s2, size_t n);
char *strcpy(char *dest, const char *src);
char *strncpy(char *dest, const char *src, size_t n);
int strcmp(const char *s1, const char *s2);
int strncmp(const char *s1, const char *s2, size_t n);
size_t strlen(const char *s);
char *strcat(char *dest, const char *src);
char *strncat(char *dest, const char *src, size_t n);
char *strchr(const char *s, int c);
char *strrchr(const char *s, int c);
// strings.h
int strcasecmp(const char *s1, const char *s2);
int strncasecmp(const char *s1, const char *s2, size_t n);
void bzero(void *s, size_t n);
void bcopy(const void *src, void *dest, size_t n);
// sys/stat.h
typedef size_t off_t;
struct stat {
off_t st_size; /* total size, in bytes */
};
int stat(const char *file_name, struct stat *buf);
int fstat(int filedes, struct stat *buf);
// time.h
typedef unsigned long time_t;
time_t time(time_t *t);
char *ctime(const time_t *t);
void mdelay(int milliseconds);
void udelay(int microseconds);
// unistd.h
typedef int ssize_t;
typedef int mode_t;
unsigned int sleep(unsigned int seconds);
int open(const char *pathname, int flags, ...);
int close(int fd);
ssize_t read(int fd, void *buf, size_t count);
ssize_t write(int fd, const void *buf, size_t count);

398
source/inc/mpt2sas_ctl.h Executable file
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/***************************************************************************
* *
* Copyright 2012 LSI Corporation. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Corporation. The *
* receipt of or possession of this file does not convey any rights to *
* reproduce or disclose its contents or to manufacture, use, or sell *
* anything it may describe, in whole, or in part, without the specific *
* written consent of LSI Corporation. *
* *
***************************************************************************
*/
#ifndef MPT2SAS_CTL_H_INCLUDED
#define MPT2SAS_CTL_H_INCLUDED
#ifdef __KERNEL__
#include <linux/miscdevice.h>
#endif
/**
* NOTE
* FWDOWNLOAD - PR is let me know if we need to implement this
* DIAGBUFFER - PR said hold off
*/
/**
* HACK - changeme (MPT_MINOR = 220 )
*/
#ifndef MPT2SAS_MINOR
#define MPT2SAS_MINOR (MPT_MINOR + 1)
#endif
#define MPT2SAS_DEV_NAME "mpt2ctl"
#define MPT2_MAGIC_NUMBER 'L'
#define MPT2_IOCTL_DEFAULT_TIMEOUT (10) /* in seconds */
/**
* IOCTL opcodes
*/
#define MPT2IOCINFO _IOWR(MPT2_MAGIC_NUMBER, 17, \
struct mpt2_ioctl_iocinfo)
#define MPT2COMMAND _IOWR(MPT2_MAGIC_NUMBER, 20, \
struct mpt2_ioctl_command)
#ifdef CONFIG_COMPAT
#define MPT2COMMAND32 _IOWR(MPT2_MAGIC_NUMBER, 20, \
struct mpt2_ioctl_command32)
#endif
#define MPT2EVENTQUERY _IOWR(MPT2_MAGIC_NUMBER, 21, \
struct mpt2_ioctl_eventquery)
#define MPT2EVENTENABLE _IOWR(MPT2_MAGIC_NUMBER, 22, \
struct mpt2_ioctl_eventenable)
#define MPT2EVENTREPORT _IOWR(MPT2_MAGIC_NUMBER, 23, \
struct mpt2_ioctl_eventreport)
#define MPT2HARDRESET _IOWR(MPT2_MAGIC_NUMBER, 24, \
struct mpt2_ioctl_diag_reset)
#define MPT2BTDHMAPPING _IOWR(MPT2_MAGIC_NUMBER, 31, \
struct mpt2_ioctl_btdh_mapping)
/* diag buffer support */
#define MPT2DIAGREGISTER _IOWR(MPT2_MAGIC_NUMBER, 26, \
struct mpt2_diag_register)
#define MPT2DIAGRELEASE _IOWR(MPT2_MAGIC_NUMBER, 27, \
struct mpt2_diag_release)
#define MPT2DIAGUNREGISTER _IOWR(MPT2_MAGIC_NUMBER, 28, \
struct mpt2_diag_unregister)
#define MPT2DIAGQUERY _IOWR(MPT2_MAGIC_NUMBER, 29, \
struct mpt2_diag_query)
#define MPT2DIAGREADBUFFER _IOWR(MPT2_MAGIC_NUMBER, 30, \
struct mpt2_diag_read_buffer)
/**
* struct mpt2_ioctl_header - main header structure
* @ioc_number - IOC unit number
* @port_number - IOC port number
* @max_data_size - maximum number bytes to transfer on read
*/
struct mpt2_ioctl_header {
uint32_t ioc_number;
uint32_t port_number;
uint32_t max_data_size;
};
/**
* struct mpt2_ioctl_diag_reset - diagnostic reset
* @hdr - generic header
*/
struct mpt2_ioctl_diag_reset {
struct mpt2_ioctl_header hdr;
};
/**
* struct mpt2_ioctl_pci_info - pci device info
* @device - pci device id
* @function - pci function id
* @bus - pci bus id
* @segment_id - pci segment id
*/
struct mpt2_ioctl_pci_info {
union {
struct {
uint32_t device:5;
uint32_t function:3;
uint32_t bus:24;
} bits;
uint32_t word;
} u;
uint32_t segment_id;
};
#define MPT2_IOCTL_INTERFACE_SCSI (0x00)
#define MPT2_IOCTL_INTERFACE_FC (0x01)
#define MPT2_IOCTL_INTERFACE_FC_IP (0x02)
#define MPT2_IOCTL_INTERFACE_SAS (0x03)
#define MPT2_IOCTL_INTERFACE_SAS2 (0x04)
#define MPT2_IOCTL_VERSION_LENGTH (32)
/**
* struct mpt2_ioctl_iocinfo - generic controller info
* @hdr - generic header
* @adapter_type - type of adapter (spi, fc, sas)
* @port_number - port number
* @pci_id - PCI Id
* @hw_rev - hardware revision
* @sub_system_device - PCI subsystem Device ID
* @sub_system_vendor - PCI subsystem Vendor ID
* @rsvd0 - reserved
* @firmware_version - firmware version
* @bios_version - BIOS version
* @driver_version - driver version - 32 ASCII characters
* @rsvd1 - reserved
* @scsi_id - scsi id of adapter 0
* @rsvd2 - reserved
* @pci_information - pci info (2nd revision)
*/
struct mpt2_ioctl_iocinfo {
struct mpt2_ioctl_header hdr;
uint32_t adapter_type;
uint32_t port_number;
uint32_t pci_id;
uint32_t hw_rev;
uint32_t subsystem_device;
uint32_t subsystem_vendor;
uint32_t rsvd0;
uint32_t firmware_version;
uint32_t bios_version;
uint8_t driver_version[MPT2_IOCTL_VERSION_LENGTH];
uint8_t rsvd1;
uint8_t scsi_id;
uint16_t rsvd2;
struct mpt2_ioctl_pci_info pci_information;
};
/* number of event log entries */
#define MPT2SAS_CTL_EVENT_LOG_SIZE (50)
/**
* struct mpt2_ioctl_eventquery - query event count and type
* @hdr - generic header
* @event_entries - number of events returned by get_event_report
* @rsvd - reserved
* @event_types - type of events currently being captured
*/
struct mpt2_ioctl_eventquery {
struct mpt2_ioctl_header hdr;
uint16_t event_entries;
uint16_t rsvd;
uint32_t event_types[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
};
/**
* struct mpt2_ioctl_eventenable - enable/disable event capturing
* @hdr - generic header
* @event_types - toggle off/on type of events to be captured
*/
struct mpt2_ioctl_eventenable {
struct mpt2_ioctl_header hdr;
uint32_t event_types[4];
};
#define MPT2_EVENT_DATA_SIZE (192)
/**
* struct MPT2_IOCTL_EVENTS -
* @event - the event that was reported
* @context - unique value for each event assigned by driver
* @data - event data returned in fw reply message
*/
struct MPT2_IOCTL_EVENTS {
uint32_t event;
uint32_t context;
uint8_t data[MPT2_EVENT_DATA_SIZE];
};
/**
* struct mpt2_ioctl_eventreport - returing event log
* @hdr - generic header
* @event_data - (see struct MPT2_IOCTL_EVENTS)
*/
struct mpt2_ioctl_eventreport {
struct mpt2_ioctl_header hdr;
struct MPT2_IOCTL_EVENTS event_data[1];
};
/**
* struct mpt2_ioctl_command - generic mpt firmware passthru ioclt
* @hdr - generic header
* @timeout - command timeout in seconds. (if zero then use driver default
* value).
* @reply_frame_buf_ptr - reply location
* @data_in_buf_ptr - destination for read
* @data_out_buf_ptr - data source for write
* @sense_data_ptr - sense data location
* @max_reply_bytes - maximum number of reply bytes to be sent to app.
* @data_in_size - number bytes for data transfer in (read)
* @data_out_size - number bytes for data transfer out (write)
* @max_sense_bytes - maximum number of bytes for auto sense buffers
* @data_sge_offset - offset in words from the start of the request message to
* the first SGL
* @mf[1];
*/
struct mpt2_ioctl_command {
struct mpt2_ioctl_header hdr;
uint32_t timeout;
void __user *reply_frame_buf_ptr;
void __user *data_in_buf_ptr;
void __user *data_out_buf_ptr;
void __user *sense_data_ptr;
uint32_t max_reply_bytes;
uint32_t data_in_size;
uint32_t data_out_size;
uint32_t max_sense_bytes;
uint32_t data_sge_offset;
uint8_t mf[1];
};
#ifdef CONFIG_COMPAT
struct mpt2_ioctl_command32 {
struct mpt2_ioctl_header hdr;
uint32_t timeout;
uint32_t reply_frame_buf_ptr;
uint32_t data_in_buf_ptr;
uint32_t data_out_buf_ptr;
uint32_t sense_data_ptr;
uint32_t max_reply_bytes;
uint32_t data_in_size;
uint32_t data_out_size;
uint32_t max_sense_bytes;
uint32_t data_sge_offset;
uint8_t mf[1];
};
#endif
/**
* struct mpt2_ioctl_btdh_mapping - mapping info
* @hdr - generic header
* @id - target device identification number
* @bus - SCSI bus number that the target device exists on
* @handle - device handle for the target device
* @rsvd - reserved
*
* To obtain a bus/id the application sets
* handle to valid handle, and bus/id to 0xFFFF.
*
* To obtain the device handle the application sets
* bus/id valid value, and the handle to 0xFFFF.
*/
struct mpt2_ioctl_btdh_mapping {
struct mpt2_ioctl_header hdr;
uint32_t id;
uint32_t bus;
uint16_t handle;
uint16_t rsvd;
};
/* status bits for ioc->diag_buffer_status */
#define MPT2_DIAG_BUFFER_IS_REGISTERED (0x01)
#define MPT2_DIAG_BUFFER_IS_RELEASED (0x02)
#define MPT2_DIAG_BUFFER_IS_DIAG_RESET (0x04)
/* application flags for mpt2_diag_register, mpt2_diag_query */
#define MPT2_APP_FLAGS_APP_OWNED (0x0001)
#define MPT2_APP_FLAGS_BUFFER_VALID (0x0002)
#define MPT2_APP_FLAGS_FW_BUFFER_ACCESS (0x0004)
/* flags for mpt2_diag_read_buffer */
#define MPT2_FLAGS_REREGISTER (0x0001)
#define MPT2_PRODUCT_SPECIFIC_DWORDS 23
/**
* struct mpt2_diag_register - application register with driver
* @hdr - generic header
* @reserved -
* @buffer_type - specifies either TRACE or SNAPSHOT
* @application_flags - misc flags
* @diagnostic_flags - specifies flags affecting command processing
* @product_specific - product specific information
* @requested_buffer_size - buffers size in bytes
* @unique_id - tag specified by application that is used to signal ownership
* of the buffer.
*
* This will allow the driver to setup any required buffers that will be
* needed by firmware to communicate with the driver.
*/
struct mpt2_diag_register {
struct mpt2_ioctl_header hdr;
uint8_t reserved;
uint8_t buffer_type;
uint16_t application_flags;
uint32_t diagnostic_flags;
uint32_t product_specific[MPT2_PRODUCT_SPECIFIC_DWORDS];
uint32_t requested_buffer_size;
uint32_t unique_id;
};
/**
* struct mpt2_diag_unregister - application unregister with driver
* @hdr - generic header
* @unique_id - tag uniquely identifies the buffer to be unregistered
*
* This will allow the driver to cleanup any memory allocated for diag
* messages and to free up any resources.
*/
struct mpt2_diag_unregister {
struct mpt2_ioctl_header hdr;
uint32_t unique_id;
};
/**
* struct mpt2_diag_query - query relevant info associated with diag buffers
* @hdr - generic header
* @reserved -
* @buffer_type - specifies either TRACE or SNAPSHOT
* @application_flags - misc flags
* @diagnostic_flags - specifies flags affecting command processing
* @product_specific - product specific information
* @total_buffer_size - diag buffer size in bytes
* @driver_added_buffer_size - size of extra space appended to end of buffer
* @unique_id - unique id associated with this buffer.
*
* The application will send only buffer_type and unique_id. Driver will
* inspect unique_id first, if valid, fill in all the info. If unique_id is
* 0x00, the driver will return info specified by Buffer Type.
*/
struct mpt2_diag_query {
struct mpt2_ioctl_header hdr;
uint8_t reserved;
uint8_t buffer_type;
uint16_t application_flags;
uint32_t diagnostic_flags;
uint32_t product_specific[MPT2_PRODUCT_SPECIFIC_DWORDS];
uint32_t total_buffer_size;
uint32_t driver_added_buffer_size;
uint32_t unique_id;
};
/**
* struct mpt2_diag_release - request to send Diag Release Message to firmware
* @hdr - generic header
* @unique_id - tag uniquely identifies the buffer to be released
*
* This allows ownership of the specified buffer to returned to the driver,
* allowing an application to read the buffer without fear that firmware is
* overwritting information in the buffer.
*/
struct mpt2_diag_release {
struct mpt2_ioctl_header hdr;
uint32_t unique_id;
};
/**
* struct mpt2_diag_read_buffer - request for copy of the diag buffer
* @hdr - generic header
* @status -
* @reserved -
* @flags - misc flags
* @starting_offset - starting offset within drivers buffer where to start
* reading data at into the specified application buffer
* @bytes_to_read - number of bytes to copy from the drivers buffer into the
* application buffer starting at starting_offset.
* @unique_id - unique id associated with this buffer.
* @diagnostic_data - data payload
*/
struct mpt2_diag_read_buffer {
struct mpt2_ioctl_header hdr;
uint8_t status;
uint8_t reserved;
uint16_t flags;
uint32_t starting_offset;
uint32_t bytes_to_read;
uint32_t unique_id;
uint32_t diagnostic_data[1];
};
#endif /* MPT2SAS_CTL_H_INCLUDED */

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/***************************************************************************
* *
* Copyright 2012 LSI Corporation. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Corporation. The *
* receipt of or possession of this file does not convey any rights to *
* reproduce or disclose its contents or to manufacture, use, or sell *
* anything it may describe, in whole, or in part, without the specific *
* written consent of LSI Corporation. *
* *
***************************************************************************
*/
#ifndef MPTCTL_H_INCLUDED
#define MPTCTL_H_INCLUDED
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#include "linux/version.h"
#include "../lsi/mpi_ioc.h"
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
*
*/
#define MPT_MISCDEV_BASENAME "mptctl"
#define MPT_MISCDEV_PATHNAME "/dev/" MPT_MISCDEV_BASENAME
#define MPT_CSMI_DESCRIPTION "LSI Logic Corporation: Fusion MPT Driver " MPT_LINUX_VERSION_COMMON
#define MPT_PRODUCT_LENGTH 12
/*
* Generic MPT Control IOCTLs and structures
*/
#define MPT_MAGIC_NUMBER 'm'
#define MPTRWPERF _IOWR(MPT_MAGIC_NUMBER,0,struct mpt_raw_r_w)
#define MPTFWDOWNLOAD _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer)
#define MPTFWDOWNLOADBOOT _IOWR(MPT_MAGIC_NUMBER,16,struct mpt_fw_xfer)
#define MPTCOMMAND _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command)
#if defined(__KERNEL__) && defined(MPT_CONFIG_COMPAT)
#define MPTFWDOWNLOAD32 _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer32)
#define MPTCOMMAND32 _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command32)
#endif
#define MPTIOCINFO _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo)
#define MPTIOCINFO1 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev0)
#define MPTIOCINFO2 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev1)
#define MPTTARGETINFO _IOWR(MPT_MAGIC_NUMBER,18,struct mpt_ioctl_targetinfo)
#define MPTTEST _IOWR(MPT_MAGIC_NUMBER,19,struct mpt_ioctl_test)
#define MPTEVENTQUERY _IOWR(MPT_MAGIC_NUMBER,21,struct mpt_ioctl_eventquery)
#define MPTEVENTENABLE _IOWR(MPT_MAGIC_NUMBER,22,struct mpt_ioctl_eventenable)
#define MPTEVENTREPORT _IOWR(MPT_MAGIC_NUMBER,23,struct mpt_ioctl_eventreport)
#define MPTHARDRESET _IOWR(MPT_MAGIC_NUMBER,24,struct mpt_ioctl_diag_reset)
#define MPTFWREPLACE _IOWR(MPT_MAGIC_NUMBER,25,struct mpt_ioctl_replace_fw)
#define MPTDIAGREGISTER _IOWR(MPT_MAGIC_NUMBER,26,mpt_diag_register_t)
#define MPTDIAGRELEASE _IOWR(MPT_MAGIC_NUMBER,27,mpt_diag_release_t)
#define MPTDIAGUNREGISTER _IOWR(MPT_MAGIC_NUMBER,28,mpt_diag_unregister_t)
#define MPTDIAGQUERY _IOWR(MPT_MAGIC_NUMBER,29,mpt_diag_query_t)
#define MPTDIAGREADBUFFER _IOWR(MPT_MAGIC_NUMBER,30,mpt_diag_read_buffer_t)
#define MPTHBAPCIINFO _IOWR(MPT_MAGIC_NUMBER,31,struct mpt_ioctl_hbapciinfo)
#define MPTDIAGRESET _IOWR(MPT_MAGIC_NUMBER,32,struct mpt_ioctl_diag_reset)
/*
* SPARC PLATFORM REMARKS:
* IOCTL data structures that contain pointers
* will have different sizes in the driver and applications
* (as the app. will not use 8-byte pointers).
* Apps should use MPTFWDOWNLOAD and MPTCOMMAND.
* The driver will convert data from
* mpt_fw_xfer32 (mpt_ioctl_command32) to mpt_fw_xfer (mpt_ioctl_command)
* internally.
*
* If data structures change size, must handle as in IOCGETINFO.
*/
struct mpt_fw_xfer {
unsigned int iocnum; /* IOC unit number */
unsigned int fwlen;
void *bufp; /* Pointer to firmware buffer */
};
#if defined(__KERNEL__) && defined(MPT_CONFIG_COMPAT)
struct mpt_fw_xfer32 {
unsigned int iocnum;
unsigned int fwlen;
U32 bufp;
};
#endif /*}*/
/*
* IOCTL header structure.
* iocnum - must be defined.
* port - must be defined for all IOCTL commands other than MPTIOCINFO
* maxDataSize - ignored on MPTCOMMAND commands
* - ignored on MPTFWREPLACE commands
* - on query commands, reports the maximum number of bytes to be returned
* to the host driver (count includes the header).
* That is, set to sizeof(struct mpt_ioctl_iocinfo) for fixed sized commands.
* Set to sizeof(struct mpt_ioctl_targetinfo) + datasize for variable
* sized commands. (MPTTARGETINFO, MPTEVENTREPORT)
*/
typedef struct _mpt_ioctl_header {
unsigned int iocnum; /* IOC unit number */
unsigned int port; /* IOC port number */
int maxDataSize; /* Maximum Num. bytes to transfer on read */
} mpt_ioctl_header;
/*
* Issue a diagnostic reset
*/
struct mpt_ioctl_diag_reset {
mpt_ioctl_header hdr;
};
/*
* PCI bus/device/function information structure.
*/
struct mpt_ioctl_pci_info {
union {
struct {
unsigned int deviceNumber : 5;
unsigned int functionNumber : 3;
unsigned int busNumber : 24;
} bits;
unsigned int asUlong;
} u;
};
struct mpt_ioctl_pci_info2 {
union {
struct {
unsigned int deviceNumber : 5;
unsigned int functionNumber : 3;
unsigned int busNumber : 24;
} bits;
unsigned int asUlong;
} u;
int segmentID;
};
/*
* Adapter Information Page
* Read only.
* Data starts at offset 0xC
*/
#define MPT_IOCTL_INTERFACE_SCSI (0x00)
#define MPT_IOCTL_INTERFACE_FC (0x01)
#define MPT_IOCTL_INTERFACE_SAS (0x03)
#define MPT_IOCTL_VERSION_LENGTH (32)
struct mpt_ioctl_iocinfo {
mpt_ioctl_header hdr;
int adapterType; /* SCSI or FCP */
int port; /* port number */
int pciId; /* PCI Id. */
int hwRev; /* hardware revision */
int subSystemDevice; /* PCI subsystem Device ID */
int subSystemVendor; /* PCI subsystem Vendor ID */
int numDevices; /* number of devices */
int FWVersion; /* FW Version (integer) */
int BIOSVersion; /* BIOS Version (integer) */
char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
char busChangeEvent;
char hostId;
char rsvd[2];
struct mpt_ioctl_pci_info2 pciInfo; /* Added Rev 2 */
};
struct mpt_ioctl_iocinfo_rev1 {
mpt_ioctl_header hdr;
int adapterType; /* SCSI or FCP */
int port; /* port number */
int pciId; /* PCI Id. */
int hwRev; /* hardware revision */
int subSystemDevice; /* PCI subsystem Device ID */
int subSystemVendor; /* PCI subsystem Vendor ID */
int numDevices; /* number of devices */
int FWVersion; /* FW Version (integer) */
int BIOSVersion; /* BIOS Version (integer) */
char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
char busChangeEvent;
char hostId;
char rsvd[2];
struct mpt_ioctl_pci_info pciInfo; /* Added Rev 1 */
};
/* Original structure, must always accept these
* IOCTLs. 4 byte pads can occur based on arch with
* above structure. Wish to re-align, but cannot.
*/
struct mpt_ioctl_iocinfo_rev0 {
mpt_ioctl_header hdr;
int adapterType; /* SCSI or FCP */
int port; /* port number */
int pciId; /* PCI Id. */
int hwRev; /* hardware revision */
int subSystemDevice; /* PCI subsystem Device ID */
int subSystemVendor; /* PCI subsystem Vendor ID */
int numDevices; /* number of devices */
int FWVersion; /* FW Version (integer) */
int BIOSVersion; /* BIOS Version (integer) */
char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
char busChangeEvent;
char hostId;
char rsvd[2];
};
/*
* Device Information Page
* Report the number of, and ids of, all targets
* on this IOC. The ids array is a packed structure
* of the known targetInfo.
* bits 31-24: reserved
* 23-16: LUN
* 15- 8: Bus Number
* 7- 0: Target ID
*/
struct mpt_ioctl_targetinfo {
mpt_ioctl_header hdr;
int numDevices; /* Num targets on this ioc */
int targetInfo[1];
};
/*
* Event reporting IOCTL's. These IOCTL's will
* use the following defines:
*/
struct mpt_ioctl_eventquery {
mpt_ioctl_header hdr;
unsigned short eventEntries;
unsigned short reserved;
unsigned int eventTypes;
};
struct mpt_ioctl_eventenable {
mpt_ioctl_header hdr;
unsigned int eventTypes;
};
#ifndef __KERNEL__
typedef struct {
uint event;
uint eventContext;
uint data[2];
} MPT_IOCTL_EVENTS;
#endif
struct mpt_ioctl_eventreport {
mpt_ioctl_header hdr;
MPT_IOCTL_EVENTS eventData[1];
};
#define MPT_MAX_NAME 32
struct mpt_ioctl_test {
mpt_ioctl_header hdr;
U8 name[MPT_MAX_NAME];
int chip_type;
U8 product [MPT_PRODUCT_LENGTH];
};
/* Replace the FW image cached in host driver memory
* newImageSize - image size in bytes
* newImage - first byte of the new image
*/
typedef struct mpt_ioctl_replace_fw {
mpt_ioctl_header hdr;
int newImageSize;
U8 newImage[1];
} mpt_ioctl_replace_fw_t;
struct mpt_ioctl_mptpciinfo {
U8 iocNumber;
U8 iocState;
U8 revisionID;
U8 reserved1;
U16 vendorID;
U16 deviceID;
U16 subSystemVendorID;
U16 subSystemID;
};
struct mpt_ioctl_hbapciinfo {
mpt_ioctl_header hdr;
U8 totalIOC;
U8 reserved[3];
struct mpt_ioctl_mptpciinfo hbapciinfo[18];
};
/* General MPT Pass through data structure
*
* iocnum
* timeout - in seconds, command timeout. If 0, set by driver to
* default value.
* replyFrameBufPtr - reply location
* dataInBufPtr - destination for read
* dataOutBufPtr - data source for write
* senseDataPtr - sense data location
* maxReplyBytes - maximum number of reply bytes to be sent to app.
* dataInSize - num bytes for data transfer in (read)
* dataOutSize - num bytes for data transfer out (write)
* dataSgeOffset - offset in words from the start of the request message
* to the first SGL
* MF[1];
*
* Remark: Some config pages have bi-directional transfer,
* both a read and a write. The basic structure allows for
* a bidirectional set up. Normal messages will have one or
* both of these buffers NULL.
*/
struct mpt_ioctl_command {
mpt_ioctl_header hdr;
int timeout; /* optional (seconds) */
char *replyFrameBufPtr;
char *dataInBufPtr;
char *dataOutBufPtr;
char *senseDataPtr;
int maxReplyBytes;
int dataInSize;
int dataOutSize;
int maxSenseBytes;
int dataSgeOffset;
char MF[1];
};
/*
* SPARC PLATFORM: See earlier remark.
*/
#if defined(__KERNEL__) && defined(MPT_CONFIG_COMPAT)
struct mpt_ioctl_command32 {
mpt_ioctl_header hdr;
int timeout;
U32 replyFrameBufPtr;
U32 dataInBufPtr;
U32 dataOutBufPtr;
U32 senseDataPtr;
int maxReplyBytes;
int dataInSize;
int dataOutSize;
int maxSenseBytes;
int dataSgeOffset;
char MF[1];
};
#endif /*}*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
* HP Specific IOCTL Defines and Structures
*/
#define CPQFCTS_IOC_MAGIC 'Z'
#define HP_IOC_MAGIC 'Z'
#define HP_GETHOSTINFO _IOR(HP_IOC_MAGIC, 20, hp_host_info_t)
#define HP_GETHOSTINFO1 _IOR(HP_IOC_MAGIC, 20, hp_host_info_rev0_t)
#define HP_GETTARGETINFO _IOR(HP_IOC_MAGIC, 21, hp_target_info_t)
/* All HP IOCTLs must include this header
*/
typedef struct _hp_header {
unsigned int iocnum;
unsigned int host;
unsigned int channel;
unsigned int id;
unsigned int lun;
} hp_header_t;
/*
* Header:
* iocnum required (input)
* host ignored
* channe ignored
* id ignored
* lun ignored
*/
typedef struct _hp_host_info {
hp_header_t hdr;
U16 vendor;
U16 device;
U16 subsystem_vendor;
U16 subsystem_id;
U8 devfn;
U8 bus;
ushort host_no; /* SCSI Host number, if scsi driver not loaded*/
U8 fw_version[16]; /* string */
U8 serial_number[24]; /* string */
U32 ioc_status;
U32 bus_phys_width;
U32 base_io_addr;
U32 rsvd;
unsigned int hard_resets; /* driver initiated resets */
unsigned int soft_resets; /* ioc, external resets */
unsigned int timeouts; /* num timeouts */
} hp_host_info_t;
/* replace ulongs with uints, need to preserve backwards
* compatibility.
*/
typedef struct _hp_host_info_rev0 {
hp_header_t hdr;
U16 vendor;
U16 device;
U16 subsystem_vendor;
U16 subsystem_id;
U8 devfn;
U8 bus;
ushort host_no; /* SCSI Host number, if scsi driver not loaded*/
U8 fw_version[16]; /* string */
U8 serial_number[24]; /* string */
U32 ioc_status;
U32 bus_phys_width;
U32 base_io_addr;
U32 rsvd;
unsigned long hard_resets; /* driver initiated resets */
unsigned long soft_resets; /* ioc, external resets */
unsigned long timeouts; /* num timeouts */
} hp_host_info_rev0_t;
/*
* Header:
* iocnum required (input)
* host required
* channel required (bus number)
* id required
* lun ignored
*
* All error values between 0 and 0xFFFF in size.
*/
typedef struct _hp_target_info {
hp_header_t hdr;
U32 parity_errors;
U32 phase_errors;
U32 select_timeouts;
U32 message_rejects;
U32 negotiated_speed;
U8 negotiated_width;
U8 rsvd[7]; /* 8 byte alignment */
} hp_target_info_t;
#define HP_STATUS_OTHER 1
#define HP_STATUS_OK 2
#define HP_STATUS_FAILED 3
#define HP_BUS_WIDTH_UNK 1
#define HP_BUS_WIDTH_8 2
#define HP_BUS_WIDTH_16 3
#define HP_BUS_WIDTH_32 4
#define HP_DEV_SPEED_ASYNC 2
#define HP_DEV_SPEED_FAST 3
#define HP_DEV_SPEED_ULTRA 4
#define HP_DEV_SPEED_ULTRA2 5
#define HP_DEV_SPEED_ULTRA160 6
#define HP_DEV_SPEED_SCSI1 7
#define HP_DEV_SPEED_ULTRA320 8
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#define MPI_FW_DIAG_IOCTL (0x80646961) // dia
#define MPI_FW_DIAG_TYPE_REGISTER (0x00000001)
#define MPI_FW_DIAG_TYPE_UNREGISTER (0x00000002)
#define MPI_FW_DIAG_TYPE_QUERY (0x00000003)
#define MPI_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
#define MPI_FW_DIAG_TYPE_RELEASE (0x00000005)
#define MPI_FW_DIAG_INVALID_UID (0x00000000)
#define FW_DIAGNOSTIC_BUFFER_COUNT (3)
#define FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
#define MPI_FW_DIAG_ERROR_SUCCESS (0x00000000)
#define MPI_FW_DIAG_ERROR_FAILURE (0x00000001)
#define MPI_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
#define MPI_FW_DIAG_ERROR_POST_FAILED (0x00000010)
#define MPI_FW_DIAG_ERROR_INVALID_UID (0x00000011)
#define MPI_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
#define MPI_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
#define MPI_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
#define MPT_DIAG_CAPABILITY(bufftype) (MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER << bufftype)
typedef struct _MPI_FW_DIAG_REGISTER
{
U8 TraceLevel;
U8 BufferType;
U16 Flags;
U32 ExtendedType;
U32 ProductSpecific[4];
U32 RequestedBufferSize;
U32 UniqueId;
} MPI_FW_DIAG_REGISTER, *PTR_MPI_FW_DIAG_REGISTER;
typedef struct _mpt_diag_register {
mpt_ioctl_header hdr;
MPI_FW_DIAG_REGISTER data;
} mpt_diag_register_t;
typedef struct _MPI_FW_DIAG_UNREGISTER
{
U32 UniqueId;
} MPI_FW_DIAG_UNREGISTER, *PTR_MPI_FW_DIAG_UNREGISTER;
typedef struct _mpt_diag_unregister {
mpt_ioctl_header hdr;
MPI_FW_DIAG_UNREGISTER data;
} mpt_diag_unregister_t;
#define MPI_FW_DIAG_FLAG_APP_OWNED (0x0001)
#define MPI_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
#define MPI_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
typedef struct _MPI_FW_DIAG_QUERY
{
U8 TraceLevel;
U8 BufferType;
U16 Flags;
U32 ExtendedType;
U32 ProductSpecific[4];
U32 DataSize;
U32 DriverAddedBufferSize;
U32 UniqueId;
} MPI_FW_DIAG_QUERY, *PTR_MPI_FW_DIAG_QUERY;
typedef struct _mpt_diag_query {
mpt_ioctl_header hdr;
MPI_FW_DIAG_QUERY data;
} mpt_diag_query_t;
typedef struct _MPI_FW_DIAG_RELEASE
{
U32 UniqueId;
} MPI_FW_DIAG_RELEASE, *PTR_MPI_FW_DIAG_RELEASE;
typedef struct _mpt_diag_release {
mpt_ioctl_header hdr;
MPI_FW_DIAG_RELEASE data;
} mpt_diag_release_t;
#define MPI_FW_DIAG_FLAG_REREGISTER (0x0001)
typedef struct _MPI_FW_DIAG_READ_BUFFER
{
U8 Status;
U8 Reserved;
U16 Flags;
U32 StartingOffset;
U32 BytesToRead;
U32 UniqueId;
U32 DiagnosticData[1];
} MPI_FW_DIAG_READ_BUFFER, *PTR_MPI_FW_DIAG_READ_BUFFER;
typedef struct _mpt_diag_read_buffer {
mpt_ioctl_header hdr;
MPI_FW_DIAG_READ_BUFFER data;
} mpt_diag_read_buffer_t;
typedef struct _mpt_FWDownload_MF {
FWDownload_t FWMessage;
U32 SGL_Word;
} mpt_FWDownload_MF_t;
#endif

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/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright 1998 LSI Logic Corporation. All rights reserved.
*
* This file is confidential and a trade secret of LSI Logic. The
* receipt of or possession of this file does not convey any rights to
* reproduce or disclose its contents or to manufacture, use, or sell
* anything it may describe, in whole, or in part, without the specific
* written consent of LSI Logic Corporation.
*/
#ifndef _MPTSAS_IOCTL_H
#define _MPTSAS_IOCTL_H
#ifdef __cplusplus
extern "C" {
#endif
#include <sys/types.h>
#define MPTIOCTL ('I' << 8)
#define MPTIOCTL_GET_ADAPTER_DATA (MPTIOCTL | 1)
#define MPTIOCTL_UPDATE_FLASH (MPTIOCTL | 2)
#define MPTIOCTL_RESET_ADAPTER (MPTIOCTL | 3)
#define MPTIOCTL_PASS_THRU (MPTIOCTL | 4)
#define MPTIOCTL_EVENT_QUERY (MPTIOCTL | 5)
#define MPTIOCTL_EVENT_ENABLE (MPTIOCTL | 6)
#define MPTIOCTL_EVENT_REPORT (MPTIOCTL | 7)
#define MPTIOCTL_GET_PCI_INFO (MPTIOCTL | 8)
#define MPTIOCTL_DIAG_ACTION (MPTIOCTL | 9)
/*
* The following are our ioctl() return status values. If everything went
* well, we return good status. If the buffer length sent to us is too short
* we return a status to tell the user.
*/
#define MPTIOCTL_STATUS_GOOD 0
#define MPTIOCTL_STATUS_LEN_TOO_SHORT 1
/*
* The following is the MPTIOCTL_GET_ADAPTER_DATA data structure. This data
* structure is setup so that we hopefully are properly aligned for both
* 32-bit and 64-bit mode applications.
*
* Adapter Type - Value = 4 = SCSI Protocol through SAS-2 adapter
*
* MPI Port Number - The PCI Function number for this device
*
* PCI Device HW Id - The PCI device number for this device
*
*/
#define MPTIOCTL_ADAPTER_TYPE_SAS2 4
typedef struct mptsas_adapter_data
{
uint32_t StructureLength;
uint32_t AdapterType;
uint32_t MpiPortNumber;
uint32_t PCIDeviceHwId;
uint32_t PCIDeviceHwRev;
uint32_t SubSystemId;
uint32_t SubsystemVendorId;
uint32_t Reserved1;
uint32_t MpiFirmwareVersion;
uint32_t BiosVersion;
uint8_t DriverVersion[32];
uint8_t Reserved2;
uint8_t ScsiId;
uint16_t Reserved3;
uint32_t PciInformation;
uint32_t PciSegmentId;
} mptsas_adapter_data_t;
typedef struct mptsas_update_flash
{
uint64_t PtrBuffer;
uint32_t ImageChecksum;
uint32_t ImageOffset;
uint32_t ImageSize;
uint32_t ImageType;
} mptsas_update_flash_t;
#define MPTSAS_PASS_THRU_DIRECTION_NONE 0
#define MPTSAS_PASS_THRU_DIRECTION_READ 1
#define MPTSAS_PASS_THRU_DIRECTION_WRITE 2
#define MPTSAS_PASS_THRU_DIRECTION_BOTH 3
typedef struct mptsas_pass_thru
{
uint64_t PtrRequest;
uint64_t PtrReply;
uint64_t PtrData;
uint32_t RequestSize;
uint32_t ReplySize;
uint32_t DataSize;
uint32_t DataDirection;
uint64_t PtrDataOut;
uint32_t DataOutSize;
uint32_t Timeout;
} mptsas_pass_thru_t;
/*
* Event queue defines
*/
#define MPTSAS_EVENT_QUEUE_SIZE (50) /* Max Events stored in driver */
#define MPTSAS_MAX_EVENT_DATA_LENGTH (48) /* Size of each event in Dwords */
typedef struct mptsas_event_query
{
uint16_t Entries;
uint16_t Reserved;
uint32_t Types[4];
} mptsas_event_query_t;
typedef struct mptsas_event_enable
{
uint32_t Types[4];
} mptsas_event_enable_t;
/*
* Event record entry for ioctl.
*/
typedef struct mptsas_event_entry
{
uint32_t Type;
uint32_t Number;
uint32_t Data[MPTSAS_MAX_EVENT_DATA_LENGTH];
} mptsas_event_entry_t;
typedef struct mptsas_event_report
{
uint32_t Size;
mptsas_event_entry_t Events[1];
} mptsas_event_report_t;
typedef struct mptsas_pci_info
{
uint32_t BusNumber;
uint8_t DeviceNumber;
uint8_t FunctionNumber;
uint16_t InterruptVector;
uint8_t PciHeader[256];
} mptsas_pci_info_t;
typedef struct mptsas_diag_action
{
uint32_t Action;
uint32_t Length;
uint64_t PtrDiagAction;
uint32_t ReturnCode;
} mptsas_diag_action_t;
#define MPTSAS_FW_DIAGNOSTIC_BUFFER_COUNT (3)
#define MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
#define MPTSAS_FW_DIAG_NEW (0x806E6577)
#define MPTSAS_FW_DIAG_TYPE_REGISTER (0x00000001)
#define MPTSAS_FW_DIAG_TYPE_UNREGISTER (0x00000002)
#define MPTSAS_FW_DIAG_TYPE_QUERY (0x00000003)
#define MPTSAS_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
#define MPTSAS_FW_DIAG_TYPE_RELEASE (0x00000005)
#define MPTSAS_FW_DIAG_INVALID_UID (0x00000000)
#define MPTSAS_FW_DIAG_ERROR_SUCCESS (0x00000000)
#define MPTSAS_FW_DIAG_ERROR_FAILURE (0x00000001)
#define MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
#define MPTSAS_FW_DIAG_ERROR_POST_FAILED (0x00000010)
#define MPTSAS_FW_DIAG_ERROR_INVALID_UID (0x00000011)
#define MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
#define MPTSAS_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
#define MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
typedef struct mptsas_fw_diag_register
{
uint8_t Reserved1;
uint8_t BufferType;
uint16_t ApplicationFlags;
uint32_t DiagnosticFlags;
uint32_t ProductSpecific[23];
uint32_t RequestedBufferSize;
uint32_t UniqueId;
} mptsas_fw_diag_register_t;
typedef struct mptsas_fw_diag_unregister
{
uint32_t UniqueId;
} mptsas_fw_diag_unregister_t;
#define MPTSAS_FW_DIAG_FLAG_APP_OWNED (0x0001)
#define MPTSAS_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
#define MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
typedef struct mptsas_fw_diag_query
{
uint8_t Reserved1;
uint8_t BufferType;
uint16_t ApplicationFlags;
uint32_t DiagnosticFlags;
uint32_t ProductSpecific[23];
uint32_t TotalBufferSize;
uint32_t DriverAddedBufferSize;
uint32_t UniqueId;
} mptsas_fw_diag_query_t;
typedef struct mptsas_fw_diag_release
{
uint32_t UniqueId;
} mptsas_fw_diag_release;
#define MPTSAS_FW_DIAG_FLAG_REREGISTER (0x0001)
#define MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
typedef struct mptsas_diag_read_buffer
{
uint8_t Status;
uint8_t Reserved;
uint16_t Flags;
uint32_t StartingOffset;
uint32_t BytesToRead;
uint32_t UniqueId;
uint32_t DataBuffer[1];
} mptsas_diag_read_buffer_t;
#ifdef __cplusplus
}
#endif
#endif /* _MPTSAS_IOCTL_H */

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/*++ BUILD Version: 0001 // Increment this if a change has global effects
Copyright (c) 1990-1999 Microsoft Corporation
Module Name:
ntddscsi.h
Abstract:
This is the include file that defines all constants and types for
accessing the SCSI port adapters.
Author:
Jeff Havens
Revision History:
--*/
//
// Interface GUIDs
//
// need these GUIDs outside conditional includes so that user can
// #include <ntddscsi.h> in precompiled header
// #include <initguid.h> in a single source file
// #include <ntddscsi.h> in that source file a second time to instantiate the GUIDs
//
#ifdef DEFINE_GUID
//
// Make sure FAR is defined...
//
#ifndef FAR
#ifdef _WIN32
#define FAR
#else
#define FAR _far
#endif
#endif
DEFINE_GUID(ScsiRawInterfaceGuid, 0x53f56309L, 0xb6bf, 0x11d0, 0x94, 0xf2, 0x00, 0xa0, 0xc9, 0x1e, 0xfb, 0x8b);
DEFINE_GUID(WmiScsiAddressGuid, 0x53f5630fL, 0xb6bf, 0x11d0, 0x94, 0xf2, 0x00, 0xa0, 0xc9, 0x1e, 0xfb, 0x8b);
#endif
#ifndef _NTDDSCSIH_
#define _NTDDSCSIH_
#ifdef __cplusplus
extern "C" {
#endif
//
// Device Name - this string is the name of the device. It is the name
// that should be passed to NtOpenFile when accessing the device.
//
// Note: For devices that support multiple units, it should be suffixed
// with the Ascii representation of the unit number.
//
#define IOCTL_SCSI_BASE FILE_DEVICE_CONTROLLER
#define DD_SCSI_DEVICE_NAME "\\Device\\ScsiPort"
//
// NtDeviceIoControlFile IoControlCode values for this device.
//
// Warning: Remember that the low two bits of the code specify how the
// buffers are passed to the driver!
//
#define IOCTL_SCSI_PASS_THROUGH CTL_CODE(IOCTL_SCSI_BASE, 0x0401, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS)
#define IOCTL_SCSI_MINIPORT CTL_CODE(IOCTL_SCSI_BASE, 0x0402, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS)
#define IOCTL_SCSI_GET_INQUIRY_DATA CTL_CODE(IOCTL_SCSI_BASE, 0x0403, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define IOCTL_SCSI_GET_CAPABILITIES CTL_CODE(IOCTL_SCSI_BASE, 0x0404, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define IOCTL_SCSI_PASS_THROUGH_DIRECT CTL_CODE(IOCTL_SCSI_BASE, 0x0405, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS)
#define IOCTL_SCSI_GET_ADDRESS CTL_CODE(IOCTL_SCSI_BASE, 0x0406, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define IOCTL_SCSI_RESCAN_BUS CTL_CODE(IOCTL_SCSI_BASE, 0x0407, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define IOCTL_SCSI_GET_DUMP_POINTERS CTL_CODE(IOCTL_SCSI_BASE, 0x0408, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define IOCTL_SCSI_FREE_DUMP_POINTERS CTL_CODE(IOCTL_SCSI_BASE, 0x0409, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define IOCTL_IDE_PASS_THROUGH CTL_CODE(IOCTL_SCSI_BASE, 0x040a, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS)
//
// Define the SCSI pass through structure.
//
typedef struct _SCSI_PASS_THROUGH {
USHORT Length;
UCHAR ScsiStatus;
UCHAR PathId;
UCHAR TargetId;
UCHAR Lun;
UCHAR CdbLength;
UCHAR SenseInfoLength;
UCHAR DataIn;
ULONG DataTransferLength;
ULONG TimeOutValue;
ULONG_PTR DataBufferOffset;
ULONG SenseInfoOffset;
UCHAR Cdb[16];
}SCSI_PASS_THROUGH, *PSCSI_PASS_THROUGH;
//
// Define the SCSI pass through direct structure.
//
typedef struct _SCSI_PASS_THROUGH_DIRECT {
USHORT Length;
UCHAR ScsiStatus;
UCHAR PathId;
UCHAR TargetId;
UCHAR Lun;
UCHAR CdbLength;
UCHAR SenseInfoLength;
UCHAR DataIn;
ULONG DataTransferLength;
ULONG TimeOutValue;
PVOID DataBuffer;
ULONG SenseInfoOffset;
UCHAR Cdb[16];
}SCSI_PASS_THROUGH_DIRECT, *PSCSI_PASS_THROUGH_DIRECT;
//
// Define the SCSI pass through direct structure for Win64 (thunking).
//
#if defined(_WIN64)
typedef struct _SCSI_PASS_THROUGH32 {
USHORT Length;
UCHAR ScsiStatus;
UCHAR PathId;
UCHAR TargetId;
UCHAR Lun;
UCHAR CdbLength;
UCHAR SenseInfoLength;
UCHAR DataIn;
ULONG DataTransferLength;
ULONG TimeOutValue;
ULONG32 DataBufferOffset;
ULONG SenseInfoOffset;
UCHAR Cdb[16];
}SCSI_PASS_THROUGH32, *PSCSI_PASS_THROUGH32;
//
// Define the SCSI pass through direct structure.
//
typedef struct _SCSI_PASS_THROUGH_DIRECT32 {
USHORT Length;
UCHAR ScsiStatus;
UCHAR PathId;
UCHAR TargetId;
UCHAR Lun;
UCHAR CdbLength;
UCHAR SenseInfoLength;
UCHAR DataIn;
ULONG DataTransferLength;
ULONG TimeOutValue;
VOID * POINTER_32 DataBuffer;
ULONG SenseInfoOffset;
UCHAR Cdb[16];
}SCSI_PASS_THROUGH_DIRECT32, *PSCSI_PASS_THROUGH_DIRECT32;
#endif
//
// Define SCSI information.
// Used with the IOCTL_SCSI_GET_INQUIRY_DATA IOCTL.
//
typedef struct _SCSI_BUS_DATA {
UCHAR NumberOfLogicalUnits;
UCHAR InitiatorBusId;
ULONG InquiryDataOffset;
}SCSI_BUS_DATA, *PSCSI_BUS_DATA;
//
// Define SCSI adapter bus information structure..
// Used with the IOCTL_SCSI_GET_INQUIRY_DATA IOCTL.
//
typedef struct _SCSI_ADAPTER_BUS_INFO {
UCHAR NumberOfBuses;
SCSI_BUS_DATA BusData[1];
} SCSI_ADAPTER_BUS_INFO, *PSCSI_ADAPTER_BUS_INFO;
//
// Define SCSI adapter bus information.
// Used with the IOCTL_SCSI_GET_INQUIRY_DATA IOCTL.
//
typedef struct _SCSI_INQUIRY_DATA {
UCHAR PathId;
UCHAR TargetId;
UCHAR Lun;
BOOLEAN DeviceClaimed;
ULONG InquiryDataLength;
ULONG NextInquiryDataOffset;
UCHAR InquiryData[1];
}SCSI_INQUIRY_DATA, *PSCSI_INQUIRY_DATA;
//
// Define header for I/O control SRB.
//
typedef struct _SRB_IO_CONTROL {
ULONG HeaderLength;
UCHAR Signature[8];
ULONG Timeout;
ULONG ControlCode;
ULONG ReturnCode;
ULONG Length;
} SRB_IO_CONTROL, *PSRB_IO_CONTROL;
//
// SCSI port driver capabilities structure.
//
typedef struct _IO_SCSI_CAPABILITIES {
//
// Length of this structure
//
ULONG Length;
//
// Maximum transfer size in single SRB
//
ULONG MaximumTransferLength;
//
// Maximum number of physical pages per data buffer
//
ULONG MaximumPhysicalPages;
//
// Async calls from port to class
//
ULONG SupportedAsynchronousEvents;
//
// Alignment mask for data transfers.
//
ULONG AlignmentMask;
//
// Supports tagged queuing
//
BOOLEAN TaggedQueuing;
//
// Host adapter scans down for bios devices.
//
BOOLEAN AdapterScansDown;
//
// The host adapter uses programmed I/O.
//
BOOLEAN AdapterUsesPio;
} IO_SCSI_CAPABILITIES, *PIO_SCSI_CAPABILITIES;
typedef struct _SCSI_ADDRESS {
ULONG Length;
UCHAR PortNumber;
UCHAR PathId;
UCHAR TargetId;
UCHAR Lun;
}SCSI_ADDRESS, *PSCSI_ADDRESS;
//
// Define structure for returning crash dump pointers.
//
struct _ADAPTER_OBJECT;
typedef struct _DUMP_POINTERS {
struct _ADAPTER_OBJECT *AdapterObject;
PVOID MappedRegisterBase;
PVOID DumpData;
PVOID CommonBufferVa;
LARGE_INTEGER CommonBufferPa;
ULONG CommonBufferSize;
BOOLEAN AllocateCommonBuffers;
BOOLEAN UseDiskDump;
UCHAR Spare1[2];
PVOID DeviceObject;
} DUMP_POINTERS, *PDUMP_POINTERS;
//
// Define values for pass-through DataIn field.
//
#define SCSI_IOCTL_DATA_OUT 0
#define SCSI_IOCTL_DATA_IN 1
#define SCSI_IOCTL_DATA_UNSPECIFIED 2
#ifdef __cplusplus
}
#endif
#endif

1886
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/* FILE: sym_dmi.h - MPT/Fusion Driver IOCTL Support header file
*
*************************************************************************
* *
* Copyright 2001 LSI Logic. All rights reserved. *
* *
* This file is confidential and a trade secret of LSI Logic. *
* The receipt of or possession of this file does not convey any *
* rights to reproduce or disclose its contents or to manufacture, *
* use, or sell anything is may describe, in whole, or in part, *
* without the specific written consent of LSI Logic. *
* *
************************************************************************/
/*+++HDR
*
* Version History
* ---------------
*
* Date Who? Description
* -------- ---- -------------------------------------------------------
* 03/20/00 SAM Initial version
* 02/14/01 SCH Added Domain Validation
* 05/14/01 SCH Added MPI Event logging
* 07/09/01 SCH Changed MAX_VERSION_STRING from 80 to 32
* 01/02/02 SCH Added MPI diagnostic reset IOCTL
* 10/30/03 SCH Added InBand IOCTL support
* 03/24/04 BJH Added Diagnostic IOCTL support
* 09/10/08 SCH Added ADAPTER_TYPE_SAS2 define
* 10/20/08 SCH Modified diag buffer structures for Gen2
---*/
#ifndef SYM_DMI_H
#define SYM_DMI_H
#define VERSION_SIZE 4
#define MAX_VERSION_STRING 32
// support for MPI messages via an application or service IOCTL
#define MPI_MSG_IOCTL 0x806D7069 // mpi
#define DATA_FROM_APP 0x01
#define SCSI_IO 0x4000
#define DUAL_SGLS 0x8000
typedef struct _IOCTL_DETAILS {
U16 Dir; // data xfer direction
U16 MsgSize; // size in 32 bit words
U32 DataSize; // data xfer size in bytes
U32 FormattedMsg[1];
} IOCTL_DETAILS, *pIOCTL_DETAILS;
// support for host driver info / MPI event logging IOCTL
#define DRVR_INFO_IOCTL 0x8043494D // CIM
/* Adapter Types */
#define ADAPTER_TYPE_SCSI 0
#define ADAPTER_TYPE_SCSI_OVER_FC 1
#define ADAPTER_TYPE_IP_OVER_FC 2
#define ADAPTER_TYPE_SAS 3
#define ADAPTER_TYPE_SAS2 4
/* Page Codes */
#define ADAPTER_INFO_PAGE 1
#define PCI_CONFIG_SPACE_PAGE 3
#define EVENT_QUERY 10
#define EVENT_ENABLE 11
#define GET_EVENTS 12
/* Event Queue Defines */
#define EVENT_QUEUE_SIZE 50
#define MAX_EVENT_DATA_LENGTH 48
// structure to hold PCI bus/device/function information
typedef struct _MPI_PCI_INFO {
union {
struct {
ULONG DeviceNumber:5;
ULONG FunctionNumber:3;
ULONG BusNumber:24;
} bits;
ULONG AsULONG;
} u;
} MPI_PCI_INFO, *PMPI_PCI_INFO;
// Adapter Info structure
typedef struct _DRVR_ADAPTER_INFO_OUT
{
int AdapterType;
int MpiPortNumber;
int PciDeviceId;
int PciDeviceHwRev;
int SubSystem;
int SubSystemVendorId;
int NumDevicesAttached;
int MpiVersion;
U32 BiosVersion;
char DriverVersion[MAX_VERSION_STRING];
BOOLEAN BusChangeEvent;
U8 HostId;
U16 Reserved1;
MPI_PCI_INFO PciInfo;
U32 PciSegmentId;
} DRVR_ADAPTER_INFO_OUT, *PTR_DRVR_ADAPTER_INFO_OUT;
typedef struct _DRVR_INFO_SRB
{
SRB_IO_CONTROL Sic;
int PageCode; // [IN]
char PageVersion[VERSION_SIZE]; // [OUT]
DRVR_ADAPTER_INFO_OUT AdapterPageOut;
} DRVR_INFO_SRB, *PTR_DRVR_INFO_SRB;
typedef struct _PCI_CONFIG_SPACE_SRB
{
SRB_IO_CONTROL Sic;
int PageCode; // [IN]
char PageVersion[VERSION_SIZE]; // [OUT]
U32 reserved[3];
U8 PciConfigSpace[256];
} PCI_CONFIG_SPACE_SRB, *PTR_PCI_CONFIG_SPACE_SRB;
// support for MPI Event Queue
typedef struct _MPI_EVENTS_SRB
{
SRB_IO_CONTROL Sic;
int PageCode; // [IN]
char PageVersion[VERSION_SIZE]; // [OUT]
U32 EventData[1]; // page code dependent
} MPI_EVENTS_SRB, *PTR_MPI_EVENTS_SRB;
typedef struct _MPI_EVENTS_QUEUE
{
U32 EventType; // from reply frame
U32 EventNumber; // from DevExt->EventNum
U32 EventData[MAX_EVENT_DATA_LENGTH]; // from reply frame
} MPI_EVENTS_QUEUE, *PTR_MPI_EVENTS_QUEUE;
// support for MPI Diagnostic Reset IOCTL
#define MPI_DIAG_RESET 0x80727374 // rst
typedef struct _MPI_DIAG_RESET_SRB
{
SRB_IO_CONTROL Sic;
U32 NewImageSize; // replacement image size
U32 NewFWImage[1]; // new FW image to save
} MPI_DIAG_RESET_SRB, *PTR_MPI_DIAG_RESET_SRB;
// A NewImageSize of 0 indicates that no new FW image is being downloaded
// MPI register reae/write access IOCTL
#define MPI_REG_ACCESS 0x80771959 // magic number
#define REG_IO_READ 1
#define REG_IO_WRITE 2
#define REG_MEM_READ 3
#define REG_MEM_WRITE 4
typedef struct _MPI_REG_ACCESS_SRB
{
SRB_IO_CONTROL Sic;
U32 Command; // command (read/write)
U32 RegOffset; // register offset
U32 RegData; // register data
} MPI_REG_ACCESS_SRB, *PTR_MPI_REG_ACCESS_SRB;
// support for bus/target - DevHandle mapping IOCTL
// application can suppy bus/target and get devHandle or
// supply devHandle and get bus/target
#define MPI_BTDH_MAPPING 0x804D4150 // MAP
typedef struct _MPI_BTDH_MAP_SRB
{
SRB_IO_CONTROL Sic;
U32 TargetID; // target ID
U32 Bus; // bus
U16 DevHandle; // device handle
U16 Reserved;
} MPI_BTDH_MAP_SRB, *PTR_MPI_BTDH_MAP_SRB;
#define MPI_FW_DIAG_IOCTL (0x80646961) // dia
#define MPI_FW_DIAG_NEW (0x806E6577) // new
#define MPI_FW_DIAG_TYPE_REGISTER (0x00000001)
#define MPI_FW_DIAG_TYPE_UNREGISTER (0x00000002)
#define MPI_FW_DIAG_TYPE_QUERY (0x00000003)
#define MPI_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
#define MPI_FW_DIAG_TYPE_RELEASE (0x00000005)
#define MPI_FW_DIAG_INVALID_UID (0x00000000)
#define FW_DIAGNOSTIC_BUFFER_COUNT (3)
#define FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
#define MPI_FW_DIAG_ERROR_SUCCESS (0x00000000)
#define MPI_FW_DIAG_ERROR_FAILURE (0x00000001)
#define MPI_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000003)
#define MPI_FW_DIAG_ERROR_POST_FAILED (0x00000010)
#define MPI_FW_DIAG_ERROR_INVALID_UID (0x00000011)
#define MPI_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
#define MPI_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
#define MPI_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
typedef struct _MPI_FW_DIAG_IOCTL_SRB
{
SRB_IO_CONTROL Sic;
U32 MpiDiagType;
U8 PageVersion[4];
U32 MpiDiagData[1];
} MPI_FW_DIAG_IOCTL_SRB, *PTR_MPI_FW_DIAG_IOCTL_SRB;
/* diag register for gen 1 */
typedef struct _MPI_FW_DIAG_REGISTER
{
U8 TraceLevel;
U8 BufferType;
U16 Flags;
U32 ExtendedType;
U32 ProductSpecific[4];
U32 RequestedBufferSize;
U32 UniqueId;
} MPI_FW_DIAG_REGISTER, *PTR_MPI_FW_DIAG_REGISTER;
typedef struct _MPI_FW_DIAG_UNREGISTER
{
U32 UniqueId;
} MPI_FW_DIAG_UNREGISTER, *PTR_MPI_FW_DIAG_UNREGISTER;
#define MPI_FW_DIAG_FLAG_APP_OWNED (0x0001)
#define MPI_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
#define MPI_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
/* diag query for gen 1 */
typedef struct _MPI_FW_DIAG_QUERY
{
U8 TraceLevel;
U8 BufferType;
U16 Flags;
U32 ExtendedType;
U32 ProductSpecific[4];
U32 TotalBufferSize;
U32 DriverAddedBufferSize;
U32 UniqueId;
} MPI_FW_DIAG_QUERY, *PTR_MPI_FW_DIAG_QUERY;
typedef struct _MPI_FW_DIAG_RELEASE
{
U32 UniqueId;
} MPI_FW_DIAG_RELEASE, *PTR_MPI_FW_DIAG_RELEASE;
#define MPI_FW_DIAG_FLAG_REREGISTER (0x0001)
#define MPI_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
typedef struct _MPI_FW_DIAG_READ_BUFFER
{
U8 Status;
U8 Reserved;
U16 Flags;
U32 StartingOffset;
U32 BytesToRead;
U32 UniqueId;
U32 DataBuffer[1];
} MPI_FW_DIAG_READ_BUFFER, *PTR_MPI_FW_DIAG_READ_BUFFER;
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi.h
* Title: MPI Message independent structures and definitions
* Creation Date: July 27, 2000
*
* mpi.h Version: 01.05.17
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition.
* 06-06-00 01.00.01 Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR.
* 06-22-00 01.00.02 Added MPI_IOCSTATUS_LAN_ definitions.
* Removed LAN_SUSPEND function definition.
* Added MPI_MSGFLAGS_CONTINUATION_REPLY definition.
* 06-30-00 01.00.03 Added MPI_CONTEXT_REPLY_TYPE_LAN definition.
* Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros.
* 07-27-00 01.00.04 Added MPI_FAULT_ definitions.
* Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions.
* Added MPI_IOCSTATUS_INTERNAL_ERROR definition.
* Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH.
* 11-02-00 01.01.01 Original release for post 1.0 work.
* 12-04-00 01.01.02 Added new function codes.
* 01-09-01 01.01.03 Added more definitions to the system interface section
* Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT.
* 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01.
* 02-20-01 01.01.05 Started using MPI_POINTER.
* Fixed value for MPI_DIAG_RW_ENABLE.
* Added defines for MPI_DIAG_PREVENT_IOC_BOOT and
* MPI_DIAG_CLEAR_FLASH_BAD_SIG.
* Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.
* 02-27-01 01.01.06 Removed MPI_HOST_INDEX_REGISTER define.
* Added function codes for RAID.
* 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE,
* MPI_DOORBELL_USED, to better match the spec.
* 08-08-01 01.02.01 Original release for v1.2 work.
* Changed MPI_VERSION_MINOR from 0x01 to 0x02.
* Added define MPI_FUNCTION_TOOLBOX.
* 09-28-01 01.02.02 New function code MPI_SCSI_ENCLOSURE_PROCESSOR.
* 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
* 03-14-02 01.02.04 Added MPI_HEADER_VERSION_ defines.
* 05-31-02 01.02.05 Bumped MPI_HEADER_VERSION_UNIT.
* 07-12-02 01.02.06 Added define for MPI_FUNCTION_MAILBOX.
* 09-16-02 01.02.07 Bumped value for MPI_HEADER_VERSION_UNIT.
* 11-15-02 01.02.08 Added define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX and
* obsoleted define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX.
* 04-01-03 01.02.09 New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
* 06-26-03 01.02.10 Bumped MPI_HEADER_VERSION_UNIT value.
* 01-16-04 01.02.11 Added define for MPI_IOCLOGINFO_TYPE_SHIFT.
* 04-29-04 01.02.12 Added function codes for MPI_FUNCTION_DIAG_BUFFER_POST
* and MPI_FUNCTION_DIAG_RELEASE.
* Added MPI_IOCSTATUS_DIAGNOSTIC_RELEASED define.
* Bumped MPI_HEADER_VERSION_UNIT value.
* 05-11-04 01.03.01 Bumped MPI_VERSION_MINOR for MPI v1.3.
* Added codes for Inband.
* 08-19-04 01.05.01 Added defines for Host Buffer Access Control doorbell.
* Added define for offset of High Priority Request Queue.
* Added new function codes and new IOCStatus codes.
* Added a IOCLogInfo type of SAS.
* 12-07-04 01.05.02 Bumped MPI_HEADER_VERSION_UNIT.
* 12-09-04 01.05.03 Bumped MPI_HEADER_VERSION_UNIT.
* 01-15-05 01.05.04 Bumped MPI_HEADER_VERSION_UNIT.
* 02-09-05 01.05.05 Bumped MPI_HEADER_VERSION_UNIT.
* 02-22-05 01.05.06 Bumped MPI_HEADER_VERSION_UNIT.
* 03-11-05 01.05.07 Removed function codes for SCSI IO 32 and
* TargetAssistExtended requests.
* Removed EEDP IOCStatus codes.
* 06-24-05 01.05.08 Added function codes for SCSI IO 32 and
* TargetAssistExtended requests.
* Added EEDP IOCStatus codes.
* 08-03-05 01.05.09 Bumped MPI_HEADER_VERSION_UNIT.
* 08-30-05 01.05.10 Added 2 new IOCStatus codes for Target.
* 03-27-06 01.05.11 Bumped MPI_HEADER_VERSION_UNIT.
* 10-11-06 01.05.12 Bumped MPI_HEADER_VERSION_UNIT.
* 05-24-07 01.05.13 Bumped MPI_HEADER_VERSION_UNIT.
* 08-07-07 01.05.14 Bumped MPI_HEADER_VERSION_UNIT.
* 01-15-08 01.05.15 Bumped MPI_HEADER_VERSION_UNIT.
* 03-28-08 01.05.16 Bumped MPI_HEADER_VERSION_UNIT.
* 07-11-08 01.05.17 Bumped MPI_HEADER_VERSION_UNIT.
* --------------------------------------------------------------------------
*/
#ifndef MPI_H
#define MPI_H
/*****************************************************************************
*
* M P I V e r s i o n D e f i n i t i o n s
*
*****************************************************************************/
#define MPI_VERSION_MAJOR (0x01)
#define MPI_VERSION_MINOR (0x05)
#define MPI_VERSION_MAJOR_MASK (0xFF00)
#define MPI_VERSION_MAJOR_SHIFT (8)
#define MPI_VERSION_MINOR_MASK (0x00FF)
#define MPI_VERSION_MINOR_SHIFT (0)
#define MPI_VERSION ((MPI_VERSION_MAJOR << MPI_VERSION_MAJOR_SHIFT) | \
MPI_VERSION_MINOR)
#define MPI_VERSION_01_00 (0x0100)
#define MPI_VERSION_01_01 (0x0101)
#define MPI_VERSION_01_02 (0x0102)
#define MPI_VERSION_01_03 (0x0103)
#define MPI_VERSION_01_05 (0x0105)
/* Note: The major versions of 0xe0 through 0xff are reserved */
/* versioning for this MPI header set */
#define MPI_HEADER_VERSION_UNIT (0x14)
#define MPI_HEADER_VERSION_DEV (0x00)
#define MPI_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI_HEADER_VERSION_UNIT_SHIFT (8)
#define MPI_HEADER_VERSION_DEV_MASK (0x00FF)
#define MPI_HEADER_VERSION_DEV_SHIFT (0)
#define MPI_HEADER_VERSION ((MPI_HEADER_VERSION_UNIT << 8) | MPI_HEADER_VERSION_DEV)
/*****************************************************************************
*
* I O C S t a t e D e f i n i t i o n s
*
*****************************************************************************/
#define MPI_IOC_STATE_RESET (0x00000000)
#define MPI_IOC_STATE_READY (0x10000000)
#define MPI_IOC_STATE_OPERATIONAL (0x20000000)
#define MPI_IOC_STATE_FAULT (0x40000000)
#define MPI_IOC_STATE_MASK (0xF0000000)
#define MPI_IOC_STATE_SHIFT (28)
/* Fault state codes (product independent range 0x8000-0xFFFF) */
#define MPI_FAULT_REQUEST_MESSAGE_PCI_PARITY_ERROR (0x8111)
#define MPI_FAULT_REQUEST_MESSAGE_PCI_BUS_FAULT (0x8112)
#define MPI_FAULT_REPLY_MESSAGE_PCI_PARITY_ERROR (0x8113)
#define MPI_FAULT_REPLY_MESSAGE_PCI_BUS_FAULT (0x8114)
#define MPI_FAULT_DATA_SEND_PCI_PARITY_ERROR (0x8115)
#define MPI_FAULT_DATA_SEND_PCI_BUS_FAULT (0x8116)
#define MPI_FAULT_DATA_RECEIVE_PCI_PARITY_ERROR (0x8117)
#define MPI_FAULT_DATA_RECEIVE_PCI_BUS_FAULT (0x8118)
/*****************************************************************************
*
* P C I S y s t e m I n t e r f a c e R e g i s t e r s
*
*****************************************************************************/
/*
* Defines for working with the System Doorbell register.
* Values for doorbell function codes are included in the section that defines
* all the function codes (further on in this file).
*/
#define MPI_DOORBELL_OFFSET (0x00000000)
#define MPI_DOORBELL_ACTIVE (0x08000000) /* DoorbellUsed */
#define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE)
#define MPI_DOORBELL_ACTIVE_SHIFT (27)
#define MPI_DOORBELL_WHO_INIT_MASK (0x07000000)
#define MPI_DOORBELL_WHO_INIT_SHIFT (24)
#define MPI_DOORBELL_FUNCTION_MASK (0xFF000000)
#define MPI_DOORBELL_FUNCTION_SHIFT (24)
#define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
#define MPI_DOORBELL_ADD_DWORDS_SHIFT (16)
#define MPI_DOORBELL_DATA_MASK (0x0000FFFF)
#define MPI_DOORBELL_FUNCTION_SPECIFIC_MASK (0x0000FFFF)
/* values for Host Buffer Access Control doorbell function */
#define MPI_DB_HPBAC_VALUE_MASK (0x0000F000)
#define MPI_DB_HPBAC_ENABLE_ACCESS (0x01)
#define MPI_DB_HPBAC_DISABLE_ACCESS (0x02)
#define MPI_DB_HPBAC_FREE_BUFFER (0x03)
#define MPI_WRITE_SEQUENCE_OFFSET (0x00000004)
#define MPI_WRSEQ_KEY_VALUE_MASK (0x0000000F)
#define MPI_WRSEQ_1ST_KEY_VALUE (0x04)
#define MPI_WRSEQ_2ND_KEY_VALUE (0x0B)
#define MPI_WRSEQ_3RD_KEY_VALUE (0x02)
#define MPI_WRSEQ_4TH_KEY_VALUE (0x07)
#define MPI_WRSEQ_5TH_KEY_VALUE (0x0D)
#define MPI_DIAGNOSTIC_OFFSET (0x00000008)
#define MPI_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
#define MPI_DIAG_PREVENT_IOC_BOOT (0x00000200)
#define MPI_DIAG_DRWE (0x00000080)
#define MPI_DIAG_FLASH_BAD_SIG (0x00000040)
#define MPI_DIAG_RESET_HISTORY (0x00000020)
#define MPI_DIAG_RW_ENABLE (0x00000010)
#define MPI_DIAG_RESET_ADAPTER (0x00000004)
#define MPI_DIAG_DISABLE_ARM (0x00000002)
#define MPI_DIAG_MEM_ENABLE (0x00000001)
#define MPI_TEST_BASE_ADDRESS_OFFSET (0x0000000C)
#define MPI_DIAG_RW_DATA_OFFSET (0x00000010)
#define MPI_DIAG_RW_ADDRESS_OFFSET (0x00000014)
#define MPI_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
#define MPI_HIS_IOP_DOORBELL_STATUS (0x80000000)
#define MPI_HIS_REPLY_MESSAGE_INTERRUPT (0x00000008)
#define MPI_HIS_DOORBELL_INTERRUPT (0x00000001)
#define MPI_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
#define MPI_HIM_RIM (0x00000008)
#define MPI_HIM_DIM (0x00000001)
#define MPI_REQUEST_QUEUE_OFFSET (0x00000040)
#define MPI_REQUEST_POST_FIFO_OFFSET (0x00000040)
#define MPI_REPLY_QUEUE_OFFSET (0x00000044)
#define MPI_REPLY_POST_FIFO_OFFSET (0x00000044)
#define MPI_REPLY_FREE_FIFO_OFFSET (0x00000044)
#define MPI_HI_PRI_REQUEST_QUEUE_OFFSET (0x00000048)
/*****************************************************************************
*
* M e s s a g e F r a m e D e s c r i p t o r s
*
*****************************************************************************/
#define MPI_REQ_MF_DESCRIPTOR_NB_MASK (0x00000003)
#define MPI_REQ_MF_DESCRIPTOR_F_BIT (0x00000004)
#define MPI_REQ_MF_DESCRIPTOR_ADDRESS_MASK (0xFFFFFFF8)
#define MPI_ADDRESS_REPLY_A_BIT (0x80000000)
#define MPI_ADDRESS_REPLY_ADDRESS_MASK (0x7FFFFFFF)
#define MPI_CONTEXT_REPLY_A_BIT (0x80000000)
#define MPI_CONTEXT_REPLY_TYPE_MASK (0x60000000)
#define MPI_CONTEXT_REPLY_TYPE_SCSI_INIT (0x00)
#define MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET (0x01)
#define MPI_CONTEXT_REPLY_TYPE_LAN (0x02)
#define MPI_CONTEXT_REPLY_TYPE_SHIFT (29)
#define MPI_CONTEXT_REPLY_CONTEXT_MASK (0x1FFFFFFF)
/****************************************************************************/
/* Context Reply macros */
/****************************************************************************/
#define MPI_GET_CONTEXT_REPLY_TYPE(x) (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \
>> MPI_CONTEXT_REPLY_TYPE_SHIFT)
#define MPI_SET_CONTEXT_REPLY_TYPE(x, typ) \
((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) | \
(((typ) << MPI_CONTEXT_REPLY_TYPE_SHIFT) & \
MPI_CONTEXT_REPLY_TYPE_MASK))
/*****************************************************************************
*
* M e s s a g e F u n c t i o n s
* 0x80 -> 0x8F reserved for private message use per product
*
*
*****************************************************************************/
#define MPI_FUNCTION_SCSI_IO_REQUEST (0x00)
#define MPI_FUNCTION_SCSI_TASK_MGMT (0x01)
#define MPI_FUNCTION_IOC_INIT (0x02)
#define MPI_FUNCTION_IOC_FACTS (0x03)
#define MPI_FUNCTION_CONFIG (0x04)
#define MPI_FUNCTION_PORT_FACTS (0x05)
#define MPI_FUNCTION_PORT_ENABLE (0x06)
#define MPI_FUNCTION_EVENT_NOTIFICATION (0x07)
#define MPI_FUNCTION_EVENT_ACK (0x08)
#define MPI_FUNCTION_FW_DOWNLOAD (0x09)
#define MPI_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
#define MPI_FUNCTION_TARGET_ASSIST (0x0B)
#define MPI_FUNCTION_TARGET_STATUS_SEND (0x0C)
#define MPI_FUNCTION_TARGET_MODE_ABORT (0x0D)
#define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST (0x0E)
#define MPI_FUNCTION_FC_LINK_SRVC_RSP (0x0F)
#define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND (0x10)
#define MPI_FUNCTION_FC_ABORT (0x11)
#define MPI_FUNCTION_FW_UPLOAD (0x12)
#define MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND (0x13)
#define MPI_FUNCTION_FC_PRIMITIVE_SEND (0x14)
#define MPI_FUNCTION_RAID_ACTION (0x15)
#define MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16)
#define MPI_FUNCTION_TOOLBOX (0x17)
#define MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18)
#define MPI_FUNCTION_MAILBOX (0x19)
#define MPI_FUNCTION_SMP_PASSTHROUGH (0x1A)
#define MPI_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B)
#define MPI_FUNCTION_SATA_PASSTHROUGH (0x1C)
#define MPI_FUNCTION_DIAG_BUFFER_POST (0x1D)
#define MPI_FUNCTION_DIAG_RELEASE (0x1E)
#define MPI_FUNCTION_SCSI_IO_32 (0x1F)
#define MPI_FUNCTION_LAN_SEND (0x20)
#define MPI_FUNCTION_LAN_RECEIVE (0x21)
#define MPI_FUNCTION_LAN_RESET (0x22)
#define MPI_FUNCTION_TARGET_ASSIST_EXTENDED (0x23)
#define MPI_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24)
#define MPI_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25)
#define MPI_FUNCTION_INBAND_BUFFER_POST (0x28)
#define MPI_FUNCTION_INBAND_SEND (0x29)
#define MPI_FUNCTION_INBAND_RSP (0x2A)
#define MPI_FUNCTION_INBAND_ABORT (0x2B)
#define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
#define MPI_FUNCTION_IO_UNIT_RESET (0x41)
#define MPI_FUNCTION_HANDSHAKE (0x42)
#define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43)
#define MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL (0x44)
/* standard version format */
typedef struct _MPI_VERSION_STRUCT
{
U8 Dev; /* 00h */
U8 Unit; /* 01h */
U8 Minor; /* 02h */
U8 Major; /* 03h */
} MPI_VERSION_STRUCT, MPI_POINTER PTR_MPI_VERSION_STRUCT,
MpiVersionStruct_t, MPI_POINTER pMpiVersionStruct;
typedef union _MPI_VERSION_FORMAT
{
MPI_VERSION_STRUCT Struct;
U32 Word;
} MPI_VERSION_FORMAT, MPI_POINTER PTR_MPI_VERSION_FORMAT,
MpiVersionFormat_t, MPI_POINTER pMpiVersionFormat_t;
/*****************************************************************************
*
* S c a t t e r G a t h e r E l e m e n t s
*
*****************************************************************************/
/****************************************************************************/
/* Simple element structures */
/****************************************************************************/
typedef struct _SGE_SIMPLE32
{
U32 FlagsLength;
U32 Address;
} SGE_SIMPLE32, MPI_POINTER PTR_SGE_SIMPLE32,
SGESimple32_t, MPI_POINTER pSGESimple32_t;
typedef struct _SGE_SIMPLE64
{
U32 FlagsLength;
U64 Address;
} SGE_SIMPLE64, MPI_POINTER PTR_SGE_SIMPLE64,
SGESimple64_t, MPI_POINTER pSGESimple64_t;
typedef struct _SGE_SIMPLE_UNION
{
U32 FlagsLength;
union
{
U32 Address32;
U64 Address64;
}u;
} SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION,
SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t;
/****************************************************************************/
/* Chain element structures */
/****************************************************************************/
typedef struct _SGE_CHAIN32
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U32 Address;
} SGE_CHAIN32, MPI_POINTER PTR_SGE_CHAIN32,
SGEChain32_t, MPI_POINTER pSGEChain32_t;
typedef struct _SGE_CHAIN64
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U64 Address;
} SGE_CHAIN64, MPI_POINTER PTR_SGE_CHAIN64,
SGEChain64_t, MPI_POINTER pSGEChain64_t;
typedef struct _SGE_CHAIN_UNION
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
union
{
U32 Address32;
U64 Address64;
}u;
} SGE_CHAIN_UNION, MPI_POINTER PTR_SGE_CHAIN_UNION,
SGEChainUnion_t, MPI_POINTER pSGEChainUnion_t;
/****************************************************************************/
/* Transaction Context element */
/****************************************************************************/
typedef struct _SGE_TRANSACTION32
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[1];
U32 TransactionDetails[1];
} SGE_TRANSACTION32, MPI_POINTER PTR_SGE_TRANSACTION32,
SGETransaction32_t, MPI_POINTER pSGETransaction32_t;
typedef struct _SGE_TRANSACTION64
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[2];
U32 TransactionDetails[1];
} SGE_TRANSACTION64, MPI_POINTER PTR_SGE_TRANSACTION64,
SGETransaction64_t, MPI_POINTER pSGETransaction64_t;
typedef struct _SGE_TRANSACTION96
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[3];
U32 TransactionDetails[1];
} SGE_TRANSACTION96, MPI_POINTER PTR_SGE_TRANSACTION96,
SGETransaction96_t, MPI_POINTER pSGETransaction96_t;
typedef struct _SGE_TRANSACTION128
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[4];
U32 TransactionDetails[1];
} SGE_TRANSACTION128, MPI_POINTER PTR_SGE_TRANSACTION128,
SGETransaction_t128, MPI_POINTER pSGETransaction_t128;
typedef struct _SGE_TRANSACTION_UNION
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
union
{
U32 TransactionContext32[1];
U32 TransactionContext64[2];
U32 TransactionContext96[3];
U32 TransactionContext128[4];
}u;
U32 TransactionDetails[1];
} SGE_TRANSACTION_UNION, MPI_POINTER PTR_SGE_TRANSACTION_UNION,
SGETransactionUnion_t, MPI_POINTER pSGETransactionUnion_t;
/****************************************************************************/
/* SGE IO types union for IO SGL's */
/****************************************************************************/
typedef struct _SGE_IO_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_CHAIN_UNION Chain;
} u;
} SGE_IO_UNION, MPI_POINTER PTR_SGE_IO_UNION,
SGEIOUnion_t, MPI_POINTER pSGEIOUnion_t;
/****************************************************************************/
/* SGE union for SGL's with Simple and Transaction elements */
/****************************************************************************/
typedef struct _SGE_TRANS_SIMPLE_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_TRANSACTION_UNION Transaction;
} u;
} SGE_TRANS_SIMPLE_UNION, MPI_POINTER PTR_SGE_TRANS_SIMPLE_UNION,
SGETransSimpleUnion_t, MPI_POINTER pSGETransSimpleUnion_t;
/****************************************************************************/
/* All SGE types union */
/****************************************************************************/
typedef struct _SGE_MPI_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_CHAIN_UNION Chain;
SGE_TRANSACTION_UNION Transaction;
} u;
} SGE_MPI_UNION, MPI_POINTER PTR_SGE_MPI_UNION,
MPI_SGE_UNION_t, MPI_POINTER pMPI_SGE_UNION_t,
SGEAllUnion_t, MPI_POINTER pSGEAllUnion_t;
/****************************************************************************/
/* SGE field definition and masks */
/****************************************************************************/
/* Flags field bit definitions */
#define MPI_SGE_FLAGS_LAST_ELEMENT (0x80)
#define MPI_SGE_FLAGS_END_OF_BUFFER (0x40)
#define MPI_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
#define MPI_SGE_FLAGS_LOCAL_ADDRESS (0x08)
#define MPI_SGE_FLAGS_DIRECTION (0x04)
#define MPI_SGE_FLAGS_ADDRESS_SIZE (0x02)
#define MPI_SGE_FLAGS_END_OF_LIST (0x01)
#define MPI_SGE_FLAGS_SHIFT (24)
#define MPI_SGE_LENGTH_MASK (0x00FFFFFF)
#define MPI_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
/* Element Type */
#define MPI_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
#define MPI_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
#define MPI_SGE_FLAGS_CHAIN_ELEMENT (0x30)
#define MPI_SGE_FLAGS_ELEMENT_MASK (0x30)
/* Address location */
#define MPI_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
/* Direction */
#define MPI_SGE_FLAGS_IOC_TO_HOST (0x00)
#define MPI_SGE_FLAGS_HOST_TO_IOC (0x04)
/* Address Size */
#define MPI_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
#define MPI_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
/* Context Size */
#define MPI_SGE_FLAGS_32_BIT_CONTEXT (0x00)
#define MPI_SGE_FLAGS_64_BIT_CONTEXT (0x02)
#define MPI_SGE_FLAGS_96_BIT_CONTEXT (0x04)
#define MPI_SGE_FLAGS_128_BIT_CONTEXT (0x06)
#define MPI_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
#define MPI_SGE_CHAIN_OFFSET_SHIFT (16)
/****************************************************************************/
/* SGE operation Macros */
/****************************************************************************/
/* SIMPLE FlagsLength manipulations... */
#define MPI_SGE_SET_FLAGS(f) ((U32)(f) << MPI_SGE_FLAGS_SHIFT)
#define MPI_SGE_GET_FLAGS(fl) (((fl) & ~MPI_SGE_LENGTH_MASK) >> MPI_SGE_FLAGS_SHIFT)
#define MPI_SGE_LENGTH(fl) ((fl) & MPI_SGE_LENGTH_MASK)
#define MPI_SGE_CHAIN_LENGTH(fl) ((fl) & MPI_SGE_CHAIN_LENGTH_MASK)
#define MPI_SGE_SET_FLAGS_LENGTH(f,l) (MPI_SGE_SET_FLAGS(f) | MPI_SGE_LENGTH(l))
#define MPI_pSGE_GET_FLAGS(psg) MPI_SGE_GET_FLAGS((psg)->FlagsLength)
#define MPI_pSGE_GET_LENGTH(psg) MPI_SGE_LENGTH((psg)->FlagsLength)
#define MPI_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI_SGE_SET_FLAGS_LENGTH(f,l)
/* CAUTION - The following are READ-MODIFY-WRITE! */
#define MPI_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI_SGE_SET_FLAGS(f)
#define MPI_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI_SGE_LENGTH(l)
#define MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT)
/*****************************************************************************
*
* S t a n d a r d M e s s a g e S t r u c t u r e s
*
*****************************************************************************/
/****************************************************************************/
/* Standard message request header for all request messages */
/****************************************************************************/
typedef struct _MSG_REQUEST_HEADER
{
U8 Reserved[2]; /* function specific */
U8 ChainOffset;
U8 Function;
U8 Reserved1[3]; /* function specific */
U8 MsgFlags;
U32 MsgContext;
} MSG_REQUEST_HEADER, MPI_POINTER PTR_MSG_REQUEST_HEADER,
MPIHeader_t, MPI_POINTER pMPIHeader_t;
/****************************************************************************/
/* Default Reply */
/****************************************************************************/
typedef struct _MSG_DEFAULT_REPLY
{
U8 Reserved[2]; /* function specific */
U8 MsgLength;
U8 Function;
U8 Reserved1[3]; /* function specific */
U8 MsgFlags;
U32 MsgContext;
U8 Reserved2[2]; /* function specific */
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_DEFAULT_REPLY, MPI_POINTER PTR_MSG_DEFAULT_REPLY,
MPIDefaultReply_t, MPI_POINTER pMPIDefaultReply_t;
/* MsgFlags definition for all replies */
#define MPI_MSGFLAGS_CONTINUATION_REPLY (0x80)
/*****************************************************************************
*
* I O C S t a t u s V a l u e s
*
*****************************************************************************/
/****************************************************************************/
/* Common IOCStatus values for all replies */
/****************************************************************************/
#define MPI_IOCSTATUS_SUCCESS (0x0000)
#define MPI_IOCSTATUS_INVALID_FUNCTION (0x0001)
#define MPI_IOCSTATUS_BUSY (0x0002)
#define MPI_IOCSTATUS_INVALID_SGL (0x0003)
#define MPI_IOCSTATUS_INTERNAL_ERROR (0x0004)
#define MPI_IOCSTATUS_RESERVED (0x0005)
#define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
#define MPI_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI_IOCSTATUS_INVALID_STATE (0x0008)
#define MPI_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
/****************************************************************************/
/* Config IOCStatus values */
/****************************************************************************/
#define MPI_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
#define MPI_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
#define MPI_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
#define MPI_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
#define MPI_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
#define MPI_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
/****************************************************************************/
/* SCSIIO Reply (SPI & FCP) initiator values */
/****************************************************************************/
#define MPI_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
#define MPI_IOCSTATUS_SCSI_INVALID_BUS (0x0041)
#define MPI_IOCSTATUS_SCSI_INVALID_TARGETID (0x0042)
#define MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
#define MPI_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
#define MPI_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
#define MPI_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
#define MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
#define MPI_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
#define MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
#define MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
#define MPI_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
#define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
/****************************************************************************/
/* For use by SCSI Initiator and SCSI Target end-to-end data protection */
/****************************************************************************/
#define MPI_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
#define MPI_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
#define MPI_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
/****************************************************************************/
/* SCSI Target values */
/****************************************************************************/
#define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060)
#define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061)
#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) /* obsolete name */
#define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
#define MPI_IOCSTATUS_TARGET_ABORTED (0x0063)
#define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
#define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
#define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
#define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B)
#define MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
#define MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
#define MPI_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
#define MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
#define MPI_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
/****************************************************************************/
/* Additional FCP target values (obsolete) */
/****************************************************************************/
#define MPI_IOCSTATUS_TARGET_FC_ABORTED (0x0066) /* obsolete */
#define MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID (0x0067) /* obsolete */
#define MPI_IOCSTATUS_TARGET_FC_DID_INVALID (0x0068) /* obsolete */
#define MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT (0x0069) /* obsolete */
/****************************************************************************/
/* Fibre Channel Direct Access values */
/****************************************************************************/
#define MPI_IOCSTATUS_FC_ABORTED (0x0066)
#define MPI_IOCSTATUS_FC_RX_ID_INVALID (0x0067)
#define MPI_IOCSTATUS_FC_DID_INVALID (0x0068)
#define MPI_IOCSTATUS_FC_NODE_LOGGED_OUT (0x0069)
#define MPI_IOCSTATUS_FC_EXCHANGE_CANCELED (0x006C)
/****************************************************************************/
/* LAN values */
/****************************************************************************/
#define MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND (0x0080)
#define MPI_IOCSTATUS_LAN_DEVICE_FAILURE (0x0081)
#define MPI_IOCSTATUS_LAN_TRANSMIT_ERROR (0x0082)
#define MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED (0x0083)
#define MPI_IOCSTATUS_LAN_RECEIVE_ERROR (0x0084)
#define MPI_IOCSTATUS_LAN_RECEIVE_ABORTED (0x0085)
#define MPI_IOCSTATUS_LAN_PARTIAL_PACKET (0x0086)
#define MPI_IOCSTATUS_LAN_CANCELED (0x0087)
/****************************************************************************/
/* Serial Attached SCSI values */
/****************************************************************************/
#define MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
#define MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
/****************************************************************************/
/* Inband values */
/****************************************************************************/
#define MPI_IOCSTATUS_INBAND_ABORTED (0x0098)
#define MPI_IOCSTATUS_INBAND_NO_CONNECTION (0x0099)
/****************************************************************************/
/* Diagnostic Tools values */
/****************************************************************************/
#define MPI_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
/****************************************************************************/
/* IOCStatus flag to indicate that log info is available */
/****************************************************************************/
#define MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
#define MPI_IOCSTATUS_MASK (0x7FFF)
/****************************************************************************/
/* LogInfo Types */
/****************************************************************************/
#define MPI_IOCLOGINFO_TYPE_MASK (0xF0000000)
#define MPI_IOCLOGINFO_TYPE_SHIFT (28)
#define MPI_IOCLOGINFO_TYPE_NONE (0x0)
#define MPI_IOCLOGINFO_TYPE_SCSI (0x1)
#define MPI_IOCLOGINFO_TYPE_FC (0x2)
#define MPI_IOCLOGINFO_TYPE_SAS (0x3)
#define MPI_IOCLOGINFO_TYPE_ISCSI (0x4)
#define MPI_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
#endif

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/*
* Copyright (c) 2009-2010 LSI Corporation.
*
*
* Name: mpi2_hbd.h
* Title: MPI Host Based Discovery messages and structures
* Creation Date: October 21, 2009
*
* mpi2_hbd.h Version: 02.00.xx
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 10-28-09 02.00.00 Initial version.
* 08-11-10 02.00.01 Removed PortGroups, DmaGroup, and ControlGroup from
* HBD Action request, replaced by AdditionalInfo field.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_HBD_H
#define MPI2_HBD_H
/****************************************************************************
* Host Based Discovery Action messages
****************************************************************************/
/* Host Based Discovery Action Request Message */
typedef struct _MPI2_HBD_ACTION_REQUEST
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 Reserved4; /* 0x0C */
U64 SASAddress; /* 0x10 */
U32 Reserved5; /* 0x18 */
U32 HbdDeviceInfo; /* 0x1C */
U16 ParentDevHandle; /* 0x20 */
U16 MaxQDepth; /* 0x22 */
U8 FirstPhyIdentifier; /* 0x24 */
U8 Port; /* 0x25 */
U8 MaxConnections; /* 0x26 */
U8 MaxRate; /* 0x27 */
U32 AdditionalInfo; /* 0x28 */
U16 InitialAWT; /* 0x2C */
U16 Reserved7; /* 0x2E */
U32 Reserved8; /* 0x30 */
} MPI2_HBD_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_HBD_ACTION_REQUEST,
Mpi2HbdActionRequest_t, MPI2_POINTER pMpi2HbdActionRequest_t;
/* values for the Operation field */
#define MPI2_HBD_OP_ADD_DEVICE (0x01)
#define MPI2_HBD_OP_REMOVE_DEVICE (0x02)
#define MPI2_HBD_OP_UPDATE_DEVICE (0x03)
/* values for the HbdDeviceInfo field */
#define MPI2_HBD_DEVICE_INFO_VIRTUAL_DEVICE (0x00004000)
#define MPI2_HBD_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_HBD_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_HBD_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_HBD_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_HBD_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_HBD_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_HBD_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_HBD_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_HBD_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_HBD_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_HBD_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_HBD_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_HBD_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_HBD_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_HBD_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/* values for the MaxRate field */
#define MPI2_HBD_MAX_RATE_MASK (0x0F)
#define MPI2_HBD_MAX_RATE_1_5 (0x08)
#define MPI2_HBD_MAX_RATE_3_0 (0x09)
#define MPI2_HBD_MAX_RATE_6_0 (0x0A)
#define MPI25_HBD_MAX_RATE_12_0 (0x0B)
/* Host Based Discovery Action Reply Message */
typedef struct _MPI2_HBD_ACTION_REPLY
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_HBD_ACTION_REPLY, MPI2_POINTER PTR_MPI2_HBD_ACTION_REPLY,
Mpi2HbdActionReply_t, MPI2_POINTER pMpi2HbdActionReply_t;
#endif

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==============================
Fusion-MPT MPI 2.0 Header File Change History
==============================
Copyright (c) 2000-2011 LSI Corporation.
---------------------------------------
Header Set Release Version: 02.00.19
Header Set Release Date: 02-23-11
---------------------------------------
Filename Current version Prior version
---------- --------------- -------------
mpi2.h 02.00.19 02.00.18
mpi2_cnfg.h 02.00.18 02.00.17
mpi2_init.h 02.00.11 02.00.11
mpi2_ioc.h 02.00.17 02.00.16
mpi2_raid.h 02.00.05 02.00.05
mpi2_sas.h 02.00.05 02.00.05
mpi2_targ.h 02.00.04 02.00.04
mpi2_tool.h 02.00.06 02.00.06
mpi2_type.h 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00
mpi2_hbd.h 02.00.01 02.00.01
mpi2_history.txt 02.00.19 02.00.18
* Date Version Description
* -------- -------- ------------------------------------------------------
mpi2.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
* 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved ReplyPostHostIndex register to offset 0x6C of the
* MPI2_SYSTEM_INTERFACE_REGS and modified the define for
* MPI2_REPLY_POST_HOST_INDEX_OFFSET.
* Added union of request descriptors.
* Added union of reply descriptors.
* 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_VERSION_02_00.
* Fixed the size of the FunctionDependent5 field in the
* MPI2_DEFAULT_REPLY structure.
* 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
* Removed the MPI-defined Fault Codes and extended the
* product specific codes up to 0xEFFF.
* Added a sixth key value for the WriteSequence register
* and changed the flush value to 0x0.
* Added message function codes for Diagnostic Buffer Post
* and Diagnsotic Release.
* New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
* Moved MPI2_VERSION_UNION from mpi2_ioc.h.
* 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
* Added #defines for marking a reply descriptor as unused.
* 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved LUN field defines from mpi2_init.h.
* 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
* In all request and reply descriptors, replaced VF_ID
* field with MSIxIndex field.
* Removed DevHandle field from
* MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
* bytes reserved.
* Added RAID Accelerator functionality.
* 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MSI-x index mask and shift for Reply Post Host
* Index register.
* Added function code for Host Based Discovery Action.
* 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
* Added defines for product-specific range of message
* function codes, 0xF0 to 0xFF.
* 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT.
* Added alternative defines for the SGE Direction bit.
* 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define.
* 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_FUNCTION_SEND_HOST_MESSAGE.
* --------------------------------------------------------------------------
mpi2_cnfg.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags.
* Added Manufacturing Page 11.
* Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE
* define.
* 06-26-07 02.00.02 Adding generic structure for product-specific
* Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS.
* Rework of BIOS Page 2 configuration page.
* Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the
* forms.
* Added configuration pages IOC Page 8 and Driver
* Persistent Mapping Page 0.
* 08-31-07 02.00.03 Modified configuration pages dealing with Integrated
* RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1,
* RAID Physical Disk Pages 0 and 1, RAID Configuration
* Page 0).
* Added new value for AccessStatus field of SAS Device
* Page 0 (_SATA_NEEDS_INITIALIZATION).
* 10-31-07 02.00.04 Added missing SEPDevHandle field to
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
* 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for
* NVDATA.
* Modified IOC Page 7 to use masks and added field for
* SASBroadcastPrimitiveMasks.
* Added MPI2_CONFIG_PAGE_BIOS_4.
* Added MPI2_CONFIG_PAGE_LOG_0.
* 02-29-08 02.00.06 Modified various names to make them 32-character unique.
* Added SAS Device IDs.
* Updated Integrated RAID configuration pages including
* Manufacturing Page 4, IOC Page 6, and RAID Configuration
* Page 0.
* 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA.
* Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION.
* Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING.
* Added missing MaxNumRoutedSasAddresses field to
* MPI2_CONFIG_PAGE_EXPANDER_0.
* Added SAS Port Page 0.
* Modified structure layout for
* MPI2_CONFIG_PAGE_DRIVER_MAPPING_0.
* 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use
* MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array.
* 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF
* to 0x000000FF.
* Added two new values for the Physical Disk Coercion Size
* bits in the Flags field of Manufacturing Page 4.
* Added product-specific Manufacturing pages 16 to 31.
* Modified Flags bits for controlling write cache on SATA
* drives in IO Unit Page 1.
* Added new bit to AdditionalControlFlags of SAS IO Unit
* Page 1 to control Invalid Topology Correction.
* Added SupportedPhysDisks field to RAID Volume Page 1 and
* added related defines.
* Added additional defines for RAID Volume Page 0
* VolumeStatusFlags field.
* Modified meaning of RAID Volume Page 0 VolumeSettings
* define for auto-configure of hot-swap drives.
* Added PhysDiskAttributes field (and related defines) to
* RAID Physical Disk Page 0.
* Added MPI2_SAS_PHYINFO_PHY_VACANT define.
* Added three new DiscoveryStatus bits for SAS IO Unit
* Page 0 and SAS Expander Page 0.
* Removed multiplexing information from SAS IO Unit pages.
* Added BootDeviceWaitTime field to SAS IO Unit Page 4.
* Removed Zone Address Resolved bit from PhyInfo and from
* Expander Page 0 Flags field.
* Added two new AccessStatus values to SAS Device Page 0
* for indicating routing problems. Added 3 reserved words
* to this page.
* 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3.
* Inserted missing reserved field into structure for IOC
* Page 6.
* Added more pending task bits to RAID Volume Page 0
* VolumeStatusFlags defines.
* Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define.
* Added a new DiscoveryStatus bit for SAS IO Unit Page 0
* and SAS Expander Page 0 to flag a downstream initiator
* when in simplified routing mode.
* Removed SATA Init Failure defines for DiscoveryStatus
* fields of SAS IO Unit Page 0 and SAS Expander Page 0.
* Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define.
* Added PortGroups, DmaGroup, and ControlGroup fields to
* SAS Device Page 0.
* 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO
* Unit Page 6.
* Added expander reduced functionality data to SAS
* Expander Page 0.
* Added SAS PHY Page 2 and SAS PHY Page 3.
* 07-30-09 02.00.12 Added IO Unit Page 7.
* Added new device ids.
* Added SAS IO Unit Page 5.
* Added partial and slumber power management capable flags
* to SAS Device Page 0 Flags field.
* Added PhyInfo defines for power condition.
* Added Ethernet configuration pages.
* 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY.
* Added SAS PHY Page 4 structure and defines.
* 02-10-10 02.00.14 Modified the comments for the configuration page
* structures that contain an array of data. The host
* should use the "count" field in the page data (e.g. the
* NumPhys field) to determine the number of valid elements
* in the array.
* Added/modified some MPI2_MFGPAGE_DEVID_SAS defines.
* Added PowerManagementCapabilities to IO Unit Page 7.
* Added PortWidthModGroup field to
* MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS.
* Added MPI2_CONFIG_PAGE_SASIOUNIT_6 and related defines.
* Added MPI2_CONFIG_PAGE_SASIOUNIT_7 and related defines.
* Added MPI2_CONFIG_PAGE_SASIOUNIT_8 and related defines.
* 05-12-10 02.00.15 Added MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT
* define.
* Added MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE define.
* Added MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY define.
* 08-11-10 02.00.16 Removed IO Unit Page 1 device path (multi-pathing)
* defines.
* 11-10-10 02.00.17 Added ReceptacleID field (replacing Reserved1) to
* MPI2_MANPAGE7_CONNECTOR_INFO and reworked defines for
* the Pinout field.
* Added BoardTemperature and BoardTemperatureUnits fields
* to MPI2_CONFIG_PAGE_IO_UNIT_7.
* Added MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING define
* and MPI2_CONFIG_PAGE_EXT_MAN_PS structure.
* 02-23-11 02.00.18 Added ProxyVF_ID field to MPI2_CONFIG_REQUEST.
* Added IO Unit Page 8, IO Unit Page 9,
* and IO Unit Page 10.
* Added SASNotifyPrimitiveMasks field to
* MPI2_CONFIG_PAGE_IOC_7.
* --------------------------------------------------------------------------
mpi2_init.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h becasue they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
* 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
* 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
* --------------------------------------------------------------------------
mpi2_ioc.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to
* MaxTargets.
* Added TotalImageSize field to FWDownload Request.
* Added reserved words to FWUpload Request.
* 06-26-07 02.00.02 Added IR Configuration Change List Event.
* 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit
* request and replaced it with
* ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
* Replaced the MinReplyQueueDepth field of the IOCFacts
* reply with MaxReplyDescriptorPostQueueDepth.
* Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
* depth for the Reply Descriptor Post Queue.
* Added SASAddress field to Initiator Device Table
* Overflow Event data.
* 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
* for SAS Initiator Device Status Change Event data.
* Modified Reason Code defines for SAS Topology Change
* List Event data, including adding a bit for PHY Vacant
* status, and adding a mask for the Reason Code.
* Added define for
* MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
* Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
* 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of
* the IOCFacts Reply.
* Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Moved MPI2_VERSION_UNION to mpi2.h.
* Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
* instead of enables, and added SASBroadcastPrimitiveMasks
* field.
* Added Log Entry Added Event and related structure.
* 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
* Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
* Added MaxVolumes and MaxPersistentEntries fields to
* IOCFacts reply.
* Added ProtocalFlags and IOCCapabilities fields to
* MPI2_FW_IMAGE_HEADER.
* Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
* 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
* a U16 (from a U32).
* Removed extra 's' from EventMasks name.
* 06-27-08 02.00.08 Fixed an offset in a comment.
* 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
* Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
* renamed MinReplyFrameSize to ReplyFrameSize.
* Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
* Added two new RAIDOperation values for Integrated RAID
* Operations Status Event data.
* Added four new IR Configuration Change List Event data
* ReasonCode values.
* Added two new ReasonCode defines for SAS Device Status
* Change Event data.
* Added three new DiscoveryStatus bits for the SAS
* Discovery event data.
* Added Multiplexing Status Change bit to the PhyStatus
* field of the SAS Topology Change List event data.
* Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
* BootFlags are now product-specific.
* Added defines for the indivdual signature bytes
* for MPI2_INIT_IMAGE_FOOTER.
* 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
* Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
* define.
* Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
* define.
* Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
* 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
* Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
* Added two new reason codes for SAS Device Status Change
* Event.
* Added new event: SAS PHY Counter.
* 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
* Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Added new product id family for 2208.
* 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
* Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
* Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
* Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
* Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
* Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
* Added Host Based Discovery Phy Event data.
* Added defines for ProductID Product field
* (MPI2_FW_HEADER_PID_).
* Modified values for SAS ProductID Family
* (MPI2_FW_HEADER_PID_FAMILY_).
* 02-10-10 02.00.14 Added SAS Quiesce Event structure and defines.
* Added PowerManagementControl Request structures and
* defines.
* 05-12-10 02.00.15 Marked Task Set Full Event as obsolete.
* Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
* 11-10-10 02.00.16 Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
* 02-23-11 02.00.17 Added SAS NOTIFY Primitive event, and added
* SASNotifyPrimitiveMasks field to
* MPI2_EVENT_NOTIFICATION_REQUEST.
* Added Temperature Threshold Event.
* Added Host Message Event.
* Added Send Host Message request and reply.
* --------------------------------------------------------------------------
mpi2_raid.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* 05-12-10 02.00.05 Added MPI2_RAID_VOL_FLAGS_OP_MDC define.
* --------------------------------------------------------------------------
mpi2_sas.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* 05-12-10 02.00.04 Modified some comments.
* 08-11-10 02.00.05 Added NCQ operations to SAS IO Unit Control.
* --------------------------------------------------------------------------
mpi2_targ.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to
* BufferPostFlags field of CommandBufferPostBase Request.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 10-02-08 02.00.03 Removed NextCmdBufferOffset from
* MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
* Target Status Send Request only takes a single SGE for
* response data.
* 02-10-10 02.00.04 Added comment to MPI2_TARGET_SSP_RSP_IU structure.
* --------------------------------------------------------------------------
mpi2_tool.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* 05-12-10 02.00.05 Added Diagnostic Data Upload tool.
* 08-11-10 02.00.06 Added defines that were missing for Diagnostic Buffer
* Post Request.
* --------------------------------------------------------------------------
mpi2_type.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
mpi2_ra.h
* 05-06-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
mpi2_hbd.h
* 10-28-09 02.00.00 Initial version.
* 08-11-10 02.00.01 Removed PortGroups, DmaGroup, and ControlGroup from
* HBD Action request, replaced by AdditionalInfo field.
* --------------------------------------------------------------------------
mpi2_history.txt Parts list history
Filename 02.00.19 02.00.18
---------- -------- --------
mpi2.h 02.00.19 02.00.18
mpi2_cnfg.h 02.00.18 02.00.17
mpi2_init.h 02.00.11 02.00.11
mpi2_ioc.h 02.00.17 02.00.16
mpi2_raid.h 02.00.05 02.00.05
mpi2_sas.h 02.00.05 02.00.05
mpi2_targ.h 02.00.04 02.00.04
mpi2_tool.h 02.00.06 02.00.06
mpi2_type.h 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00
mpi2_hbd.h 02.00.01 02.00.01
Filename 02.00.17 02.00.16 02.00.15 02.00.14 02.00.13 02.00.12
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.17 02.00.16 02.00.15 02.00.14 02.00.13 02.00.12
mpi2_cnfg.h 02.00.16 02.00.15 02.00.14 02.00.13 02.00.12 02.00.11
mpi2_init.h 02.00.10 02.00.10 02.00.09 02.00.08 02.00.07 02.00.07
mpi2_ioc.h 02.00.15 02.00.15 02.00.14 02.00.13 02.00.12 02.00.11
mpi2_raid.h 02.00.05 02.00.05 02.00.04 02.00.04 02.00.04 02.00.03
mpi2_sas.h 02.00.05 02.00.04 02.00.03 02.00.03 02.00.02 02.00.02
mpi2_targ.h 02.00.04 02.00.04 02.00.04 02.00.03 02.00.03 02.00.03
mpi2_tool.h 02.00.06 02.00.05 02.00.04 02.00.04 02.00.04 02.00.03
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_hbd.h 02.00.01 02.00.00 02.00.00 02.00.00
Filename 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06
mpi2_cnfg.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06 02.00.06
mpi2_init.h 02.00.06 02.00.06 02.00.05 02.00.05 02.00.04 02.00.03
mpi2_ioc.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.07 02.00.06
mpi2_raid.h 02.00.03 02.00.03 02.00.03 02.00.03 02.00.02 02.00.02
mpi2_sas.h 02.00.02 02.00.02 02.00.01 02.00.01 02.00.01 02.00.01
mpi2_targ.h 02.00.03 02.00.03 02.00.02 02.00.02 02.00.02 02.00.02
mpi2_tool.h 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
Filename 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_cnfg.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_init.h 02.00.02 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ioc.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_raid.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00
mpi2_sas.h 02.00.01 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00
mpi2_targ.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00
mpi2_tool.h 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00

571
source/lsi/mpi2_init.h Executable file
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@@ -0,0 +1,571 @@
/*
* Copyright (c) 2000-2010 LSI Corporation.
*
*
* Name: mpi2_init.h
* Title: MPI SCSI initiator mode messages and structures
* Creation Date: June 23, 2006
*
* mpi2_init.h Version: 02.00.xx
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h becasue they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
* 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
* 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_INIT_H
#define MPI2_INIT_H
/*****************************************************************************
*
* SCSI Initiator Messages
*
*****************************************************************************/
/****************************************************************************
* SCSI IO messages and associated structures
****************************************************************************/
typedef struct _MPI2_SCSI_IO_CDB_EEDP32
{
U8 CDB[20]; /* 0x00 */
U32 PrimaryReferenceTag; /* 0x14 */
U16 PrimaryApplicationTag; /* 0x18 */
U16 PrimaryApplicationTagMask; /* 0x1A */
U32 TransferLength; /* 0x1C */
} MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32,
Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t;
/* MPI v2.0 CDB field */
typedef union _MPI2_SCSI_IO_CDB_UNION
{
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_SGE_SIMPLE_UNION SGE;
} MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION,
Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t;
/* MPI v2.0 SCSI IO Request Message */
typedef struct _MPI2_SCSI_IO_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 SenseBufferLowAddress; /* 0x0C */
U16 SGLFlags; /* 0x10 */
U8 SenseBufferLength; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U32 EEDPBlockSize; /* 0x28 */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U8 LUN[8]; /* 0x34 */
U32 Control; /* 0x3C */
MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
#ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
#endif
MPI2_SGE_IO_UNION SGL; /* 0x60 */
} MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST,
Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t;
/* SCSI IO MsgFlags bits */
/* MsgFlags for SenseBufferAddressSpace */
#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
/* SCSI IO SGLFlags bits */
/* base values for Data Location Address Space */
#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/* base values for Type */
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
/* shift values for each sub-field */
#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
/* number of SGLOffset fields */
#define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
/* SCSI IO IoFlags bits */
/* Large CDB Address Space */
#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/* SCSI IO EEDPFlags bits */
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
/* SCSI IO Control bits */
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
/* MPI v2.5 CDB field */
typedef union _MPI25_SCSI_IO_CDB_UNION
{
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_IEEE_SGE_SIMPLE64 SGE;
} MPI25_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI25_SCSI_IO_CDB_UNION,
Mpi25ScsiIoCdb_t, MPI2_POINTER pMpi25ScsiIoCdb_t;
/* MPI v2.5 SCSI IO Request Message */
typedef struct _MPI25_SCSI_IO_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 SenseBufferLowAddress; /* 0x0C */
U8 DMAFlags; /* 0x10 */
U8 Reserved5; /* 0x11 */
U8 SenseBufferLength; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U16 EEDPBlockSize; /* 0x28 */
U16 Reserved6; /* 0x2A */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U8 LUN[8]; /* 0x34 */
U32 Control; /* 0x3C */
MPI25_SCSI_IO_CDB_UNION CDB; /* 0x40 */
#ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion;
#endif
MPI25_SGE_IO_UNION SGL; /* 0x60 */
} MPI25_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI25_SCSI_IO_REQUEST,
Mpi25SCSIIORequest_t, MPI2_POINTER pMpi25SCSIIORequest_t;
/* use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */
/* Defines for the DMAFlags field
* Each setting affects 4 SGLS, from SGL0 to SGL3.
* D = Data
* C = Cache DIF
* I = Interleaved
* H = Host DIF
*/
#define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F)
/* number of SGLOffset fields */
#define MPI25_SCSIIO_NUM_SGLOFFSETS (4)
/* defines for the IoFlags field */
#define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
#define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
#define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI25_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
#define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/* MPI v2.5 defines for the EEDPFlags bits */
/* use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */
#define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
#define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
#define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
#define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
#define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
#define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
/* use MPI2_LUN_ defines from mpi2.h for the LUN field */
/* use MPI2_SCSIIO_CONTROL_ defines for the Control field */
/* NOTE: The SCSI IO Reply is the same for MPI 2.0 and MPI 2.5, so
* MPI2_SCSI_IO_REPLY is used for both.
*/
/* SCSI IO Error Reply Message */
typedef struct _MPI2_SCSI_IO_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 SCSIStatus; /* 0x0C */
U8 SCSIState; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferCount; /* 0x14 */
U32 SenseCount; /* 0x18 */
U32 ResponseInfo; /* 0x1C */
U16 TaskTag; /* 0x20 */
U16 Reserved4; /* 0x22 */
U32 BidirectionalTransferCount; /* 0x24 */
U32 Reserved5; /* 0x28 */
U32 Reserved6; /* 0x2C */
} MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
/* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
#define MPI2_SCSI_STATUS_GOOD (0x00)
#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI2_SCSI_STATUS_BUSY (0x08)
#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */
#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
/* SCSI IO Reply SCSIState flags */
#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI2_SCSI_STATE_TERMINATED (0x08)
#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************
* SCSI Task Management messages
****************************************************************************/
/* SCSI Task Management Request Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Reserved1; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 LUN[8]; /* 0x0C */
U32 Reserved4[7]; /* 0x14 */
U16 TaskMID; /* 0x30 */
U16 Reserved5; /* 0x32 */
} MPI2_SCSI_TASK_MANAGE_REQUEST,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
Mpi2SCSITaskManagementRequest_t,
MPI2_POINTER pMpi2SCSITaskManagementRequest_t;
/* TaskType values */
#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
/* obsolete TaskType name */
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
/* MsgFlags bits */
#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
/* SCSI Task Management Reply Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 ResponseCode; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TerminationCount; /* 0x14 */
U32 ResponseInfo; /* 0x18 */
} MPI2_SCSI_TASK_MANAGE_REPLY,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
/* ResponseCode values */
#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
/****************************************************************************
* SCSI Enclosure Processor messages
****************************************************************************/
/* SCSI Enclosure Processor Request Message */
typedef struct _MPI2_SEP_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 SlotStatus; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 Reserved5; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST,
Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t;
/* Action defines */
#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
/* Flags defines */
#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
/* SlotStatus defines */
#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
/* SCSI Enclosure Processor Reply Message */
typedef struct _MPI2_SEP_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 SlotStatus; /* 0x14 */
U32 Reserved4; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY,
Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
/* SlotStatus defines */
#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#endif

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/*
* Copyright (c) 2009 LSI Corporation.
*
*
* Name: mpi2_ra.h
* Title: MPI RAID Accelerator messages and structures
* Creation Date: April 13, 2009
*
* mpi2_ra.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-06-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RA_H
#define MPI2_RA_H
/* generic structure for RAID Accelerator Control Block */
typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
{
U32 Reserved[8]; /* 0x00 */
U32 RaidAcceleratorCDB[1]; /* 0x20 */
} MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
Mpi2RAIDAcceleratorControlBlock_t,
MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
/******************************************************************************
*
* RAID Accelerator Messages
*
*******************************************************************************/
/* RAID Accelerator Request Message */
typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
{
U16 Reserved0; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
U8 DmaEngineNumber; /* 0x14 */
U8 Reserved4; /* 0x15 */
U16 Reserved5; /* 0x16 */
U32 Reserved6; /* 0x18 */
U32 Reserved7; /* 0x1C */
U32 Reserved8; /* 0x20 */
} MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
/* RAID Accelerator Error Reply Message */
typedef struct _MPI2_RAID_ACCELERATOR_REPLY
{
U16 Reserved0; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ProductSpecificData[3]; /* 0x14 */
} MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
#endif

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/*
* Copyright (c) 2000-2010 LSI Corporation.
*
*
* Name: mpi2_raid.h
* Title: MPI Integrated RAID messages and structures
* Creation Date: April 26, 2007
*
* mpi2_raid.h Version: 02.00.05
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* 05-12-10 02.00.05 Added MPI2_RAID_VOL_FLAGS_OP_MDC define.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RAID_H
#define MPI2_RAID_H
/*****************************************************************************
*
* Integrated RAID Messages
*
*****************************************************************************/
/****************************************************************************
* RAID Action messages
****************************************************************************/
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */
#define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
#define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001)
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */
#define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001)
/* ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */
typedef struct _MPI2_RAID_ACTION_RATE_DATA
{
U8 RateToChange; /* 0x00 */
U8 RateOrMode; /* 0x01 */
U16 DataScrubDuration; /* 0x02 */
} MPI2_RAID_ACTION_RATE_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_RATE_DATA,
Mpi2RaidActionRateData_t, MPI2_POINTER pMpi2RaidActionRateData_t;
#define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00)
#define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01)
#define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02)
/* ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_START_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION,
Mpi2RaidActionStartRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStartRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_START_NEW (0x00)
#define MPI2_RAID_ACTION_START_RESUME (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
Mpi2RaidActionStopRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStopRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_STOP_ABORT (0x00)
#define MPI2_RAID_ACTION_STOP_PAUSE (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */
typedef struct _MPI2_RAID_ACTION_HOT_SPARE
{
U8 HotSparePool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 DevHandle; /* 0x02 */
} MPI2_RAID_ACTION_HOT_SPARE, MPI2_POINTER PTR_MPI2_RAID_ACTION_HOT_SPARE,
Mpi2RaidActionHotSpare_t, MPI2_POINTER pMpi2RaidActionHotSpare_t;
/* ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */
typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE
{
U8 Flags; /* 0x00 */
U8 DeviceFirmwareUpdateModeTimeout; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_FW_UPDATE_MODE,
MPI2_POINTER PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE,
Mpi2RaidActionFwUpdateMode_t, MPI2_POINTER pMpi2RaidActionFwUpdateMode_t;
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
#define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00)
#define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01)
typedef union _MPI2_RAID_ACTION_DATA
{
U32 Word;
MPI2_RAID_ACTION_RATE_DATA Rates;
MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction;
MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction;
MPI2_RAID_ACTION_HOT_SPARE HotSpare;
MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode;
} MPI2_RAID_ACTION_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_DATA,
Mpi2RaidActionData_t, MPI2_POINTER pMpi2RaidActionData_t;
/* RAID Action Request Message */
typedef struct _MPI2_RAID_ACTION_REQUEST
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
MPI2_RAID_ACTION_DATA ActionDataWord; /* 0x10 */
MPI2_SGE_SIMPLE_UNION ActionDataSGE; /* 0x14 */
} MPI2_RAID_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACTION_REQUEST,
Mpi2RaidActionRequest_t, MPI2_POINTER pMpi2RaidActionRequest_t;
/* RAID Action request Action values */
#define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01)
#define MPI2_RAID_ACTION_CREATE_VOLUME (0x02)
#define MPI2_RAID_ACTION_DELETE_VOLUME (0x03)
#define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04)
#define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05)
#define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
#define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
#define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F)
#define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
#define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17)
#define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18)
#define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19)
#define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C)
#define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D)
#define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E)
#define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20)
#define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21)
#define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22)
/* RAID Volume Creation Structure */
/*
* The following define can be customized for the targeted product.
*/
#ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS
#define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1)
#endif
typedef struct _MPI2_RAID_VOLUME_PHYSDISK
{
U8 RAIDSetNum; /* 0x00 */
U8 PhysDiskMap; /* 0x01 */
U16 PhysDiskDevHandle; /* 0x02 */
} MPI2_RAID_VOLUME_PHYSDISK, MPI2_POINTER PTR_MPI2_RAID_VOLUME_PHYSDISK,
Mpi2RaidVolumePhysDisk_t, MPI2_POINTER pMpi2RaidVolumePhysDisk_t;
/* defines for the PhysDiskMap field */
#define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01)
#define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02)
typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT
{
U8 NumPhysDisks; /* 0x00 */
U8 VolumeType; /* 0x01 */
U16 Reserved1; /* 0x02 */
U32 VolumeCreationFlags; /* 0x04 */
U32 VolumeSettings; /* 0x08 */
U8 Reserved2; /* 0x0C */
U8 ResyncRate; /* 0x0D */
U16 DataScrubDuration; /* 0x0E */
U64 VolumeMaxLBA; /* 0x10 */
U32 StripeSize; /* 0x18 */
U8 Name[16]; /* 0x1C */
MPI2_RAID_VOLUME_PHYSDISK PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS];/* 0x2C */
} MPI2_RAID_VOLUME_CREATION_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_VOLUME_CREATION_STRUCT,
Mpi2RaidVolumeCreationStruct_t, MPI2_POINTER pMpi2RaidVolumeCreationStruct_t;
/* use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */
/* defines for the VolumeCreationFlags field */
#define MPI2_RAID_VOL_CREATION_DEFAULT_SETTINGS (0x80000000)
#define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x00000004) /* MPI 2.0 only */
#define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x00000002)
#define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x00000001)
/* The following is an obsolete define.
* It must be shifted left 24 bits in order to set the proper bit.
*/
#define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80)
/* RAID Online Capacity Expansion Structure */
typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION
{
U32 Flags; /* 0x00 */
U16 DevHandle0; /* 0x04 */
U16 Reserved1; /* 0x06 */
U16 DevHandle1; /* 0x08 */
U16 Reserved2; /* 0x0A */
} MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
MPI2_POINTER PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
Mpi2RaidOnlineCapacityExpansion_t,
MPI2_POINTER pMpi2RaidOnlineCapacityExpansion_t;
/* RAID Volume Indicator Structure */
typedef struct _MPI2_RAID_VOL_INDICATOR
{
U64 TotalBlocks; /* 0x00 */
U64 BlocksRemaining; /* 0x08 */
U32 Flags; /* 0x10 */
} MPI2_RAID_VOL_INDICATOR, MPI2_POINTER PTR_MPI2_RAID_VOL_INDICATOR,
Mpi2RaidVolIndicator_t, MPI2_POINTER pMpi2RaidVolIndicator_t;
/* defines for RAID Volume Indicator Flags field */
#define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F)
#define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000)
#define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001)
#define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002)
#define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003)
#define MPI2_RAID_VOL_FLAGS_OP_MDC (0x00000004)
/* RAID Action Reply ActionData union */
typedef union _MPI2_RAID_ACTION_REPLY_DATA
{
U32 Word[5];
MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator;
U16 VolDevHandle;
U8 VolumeState;
U8 PhysDiskNum;
} MPI2_RAID_ACTION_REPLY_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY_DATA,
Mpi2RaidActionReplyData_t, MPI2_POINTER pMpi2RaidActionReplyData_t;
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* RAID Action Reply Message */
typedef struct _MPI2_RAID_ACTION_REPLY
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
MPI2_RAID_ACTION_REPLY_DATA ActionData; /* 0x14 */
} MPI2_RAID_ACTION_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY,
Mpi2RaidActionReply_t, MPI2_POINTER pMpi2RaidActionReply_t;
#endif

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/*
* Copyright (c) 2000-2010 LSI Corporation.
*
*
* Name: mpi2_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: February 9, 2007
*
* mpi2_sas.h Version: 02.00.xx
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* 05-12-10 02.00.04 Modified some comments.
* 08-11-10 02.00.05 Added NCQ operations to SAS IO Unit Control.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_SAS_H
#define MPI2_SAS_H
/*
* Values for SASStatus.
*/
#define MPI2_SASSTATUS_SUCCESS (0x00)
#define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01)
#define MPI2_SASSTATUS_INVALID_FRAME (0x02)
#define MPI2_SASSTATUS_UTC_BAD_DEST (0x03)
#define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
#define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
#define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
#define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
#define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
#define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
#define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
#define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
#define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
#define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
#define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
#define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
#define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
#define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11)
#define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
#define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
#define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
/*
* Values for the SAS DeviceInfo field used in SAS Device Status Change Event
* data and SAS Configuration pages.
*/
#define MPI2_SAS_DEVICE_INFO_SEP (0x00004000)
#define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
#define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/*****************************************************************************
*
* SAS Messages
*
*****************************************************************************/
/****************************************************************************
* SMP Passthrough messages
****************************************************************************/
/* SMP Passthrough Request Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 RequestDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */ /* MPI v2.0 only. Reserved on MPI v2.5. */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U64 SASAddress; /* 0x10 */
U32 Reserved3; /* 0x18 */
U32 Reserved4; /* 0x1C */
MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */ /* MPI v2.5: IEEE Simple 64 elements only */
} MPI2_SMP_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REQUEST,
Mpi2SmpPassthroughRequest_t, MPI2_POINTER pMpi2SmpPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
/* MPI v2.0: use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* SMP Passthrough Reply Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REPLY
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 ResponseDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 Reserved3; /* 0x14 */
U8 ResponseData[4]; /* 0x18 */
} MPI2_SMP_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REPLY,
Mpi2SmpPassthroughReply_t, MPI2_POINTER pMpi2SmpPassthroughReply_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SATA Passthrough messages
****************************************************************************/
/* SATA Passthrough Request Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */ /* MPI v2.0 only. Reserved on MPI v2.5. */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 DataLength; /* 0x18 */
U8 CommandFIS[20]; /* 0x1C */
MPI2_SGE_IO_UNION SGL; /* 0x30 */ /* MPI v2.5: IEEE 64 elements only */
} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST,
Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
#define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
#define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
/* MPI v2.0: use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* SATA Passthrough Reply Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 StatusFIS[20]; /* 0x14 */
U32 StatusControlRegisters; /* 0x28 */
U32 TransferCount; /* 0x2C */
} MPI2_SATA_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REPLY,
Mpi2SataPassthroughReply_t, MPI2_POINTER pMpi2SataPassthroughReply_t;
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SAS IO Unit Control messages
****************************************************************************/
/* SAS IO Unit Control Request Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U8 PhyNum; /* 0x0E */
U8 PrimFlags; /* 0x0F */
U32 Primitive; /* 0x10 */
U8 LookupMethod; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 SlotNumber; /* 0x16 */
U64 LookupAddress; /* 0x18 */
U32 IOCParameterValue; /* 0x20 */
U32 Reserved7; /* 0x24 */
U32 Reserved8; /* 0x28 */
} MPI2_SAS_IOUNIT_CONTROL_REQUEST,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST,
Mpi2SasIoUnitControlRequest_t, MPI2_POINTER pMpi2SasIoUnitControlRequest_t;
/* values for the Operation field */
#define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI2_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI2_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A)
#define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C)
#define MPI2_SAS_OP_REMOVE_DEVICE (0x0D)
#define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E)
#define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F)
#define MPI25_SAS_OP_ENABLE_FP_DEVICE (0x10)
#define MPI25_SAS_OP_DISABLE_FP_DEVICE (0x11)
#define MPI25_SAS_OP_ENABLE_FP_ALL (0x12)
#define MPI25_SAS_OP_DISABLE_FP_ALL (0x13)
#define MPI2_SAS_OP_DEV_ENABLE_NCQ (0x14)
#define MPI2_SAS_OP_DEV_DISABLE_NCQ (0x15)
#define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
/* values for the PrimFlags field */
#define MPI2_SAS_PRIMFLAGS_SINGLE (0x08)
#define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02)
#define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01)
/* values for the LookupMethod field */
#define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01)
#define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02)
#define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
/* SAS IO Unit Control Reply Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_SAS_IOUNIT_CONTROL_REPLY,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY,
Mpi2SasIoUnitControlReply_t, MPI2_POINTER pMpi2SasIoUnitControlReply_t;
#endif

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/*
* Copyright (c) 2000-2010 LSI Corporation.
*
*
* Name: mpi2_targ.h
* Title: MPI Target mode messages and structures
* Creation Date: September 8, 2006
*
* mpi2_targ.h Version: 02.00.xx
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to
* BufferPostFlags field of CommandBufferPostBase Request.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 10-02-08 02.00.03 Removed NextCmdBufferOffset from
* MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
* Target Status Send Request only takes a single SGE for
* response data.
* 02-10-10 02.00.04 Added comment to MPI2_TARGET_SSP_RSP_IU structure.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TARG_H
#define MPI2_TARG_H
/******************************************************************************
*
* SCSI Target Messages
*
*******************************************************************************/
/****************************************************************************
* Target Command Buffer Post Base Request
****************************************************************************/
typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST
{
U8 BufferPostFlags; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 TotalCmdBuffers; /* 0x04 */
U8 Reserved; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 CmdBufferLength; /* 0x10 */
U16 Reserved4; /* 0x12 */
U32 BaseAddressLow; /* 0x14 */
U32 BaseAddressHigh; /* 0x18 */
} MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
Mpi2TargetCmdBufferPostBaseRequest_t,
MPI2_POINTER pMpi2TargetCmdBufferPostBaseRequest_t;
/* values for the BufferPostflags field */
#define MPI2_CMD_BUF_POST_BASE_ADDRESS_SPACE_MASK (0x0C)
#define MPI2_CMD_BUF_POST_BASE_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_CMD_BUF_POST_BASE_IOCDDR_ADDRESS_SPACE (0x04)
#define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08)
#define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C)
#define MPI2_CMD_BUF_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
/****************************************************************************
* Target Command Buffer Post List Request
****************************************************************************/
typedef struct _MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST
{
U16 Reserved; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 CmdBufferCount; /* 0x04 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 IoIndex[2]; /* 0x10 */
} MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
Mpi2TargetCmdBufferPostListRequest_t,
MPI2_POINTER pMpi2TargetCmdBufferPostListRequest_t;
/****************************************************************************
* Target Command Buffer Post Base List Reply
****************************************************************************/
typedef struct _MPI2_TARGET_BUF_POST_BASE_LIST_REPLY
{
U8 Flags; /* 0x00 */
U8 Reserved; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U16 IoIndex; /* 0x14 */
U16 Reserved5; /* 0x16 */
U32 Reserved6; /* 0x18 */
} MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
MPI2_POINTER PTR_MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
Mpi2TargetCmdBufferPostBaseListReply_t,
MPI2_POINTER pMpi2TargetCmdBufferPostBaseListReply_t;
/* Flags defines */
#define MPI2_CMD_BUF_POST_REPLY_IOINDEX_VALID (0x01)
/****************************************************************************
* Command Buffer Formats (with 16 byte CDB)
****************************************************************************/
typedef struct _MPI2_TARGET_SSP_CMD_BUFFER
{
U8 FrameType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 InitiatorConnectionTag; /* 0x02 */
U32 HashedSourceSASAddress; /* 0x04 */
U16 Reserved2; /* 0x08 */
U16 Flags; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 Tag; /* 0x10 */
U16 TargetPortTransferTag; /* 0x12 */
U32 DataOffset; /* 0x14 */
/* COMMAND information unit starts here */
U8 LogicalUnitNumber[8]; /* 0x18 */
U8 Reserved4; /* 0x20 */
U8 TaskAttribute; /* lower 3 bits */ /* 0x21 */
U8 Reserved5; /* 0x22 */
U8 AdditionalCDBLength; /* upper 5 bits */ /* 0x23 */
U8 CDB[16]; /* 0x24 */
/* Additional CDB bytes extend past the CDB field */
} MPI2_TARGET_SSP_CMD_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_CMD_BUFFER,
Mpi2TargetSspCmdBuffer, MPI2_POINTER pMp2iTargetSspCmdBuffer;
typedef struct _MPI2_TARGET_SSP_TASK_BUFFER
{
U8 FrameType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 InitiatorConnectionTag; /* 0x02 */
U32 HashedSourceSASAddress; /* 0x04 */
U16 Reserved2; /* 0x08 */
U16 Flags; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 Tag; /* 0x10 */
U16 TargetPortTransferTag; /* 0x12 */
U32 DataOffset; /* 0x14 */
/* TASK information unit starts here */
U8 LogicalUnitNumber[8]; /* 0x18 */
U16 Reserved4; /* 0x20 */
U8 TaskManagementFunction; /* 0x22 */
U8 Reserved5; /* 0x23 */
U16 ManagedTaskTag; /* 0x24 */
U16 Reserved6; /* 0x26 */
U32 Reserved7; /* 0x28 */
U32 Reserved8; /* 0x2C */
U32 Reserved9; /* 0x30 */
} MPI2_TARGET_SSP_TASK_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_TASK_BUFFER,
Mpi2TargetSspTaskBuffer, MPI2_POINTER pMpi2TargetSspTaskBuffer;
/* mask and shift for HashedSourceSASAddress field */
#define MPI2_TARGET_HASHED_SAS_ADDRESS_MASK (0xFFFFFF00)
#define MPI2_TARGET_HASHED_SAS_ADDRESS_SHIFT (8)
/****************************************************************************
* MPI v2.0 Target Assist Request
****************************************************************************/
typedef struct _MPI2_TARGET_ASSIST_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 TargetAssistFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U16 SGLFlags; /* 0x10 */
U8 SequenceNumber; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U32 EEDPBlockSize; /* 0x28 */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U32 PrimaryReferenceTag; /* 0x34 */
U16 PrimaryApplicationTag; /* 0x38 */
U16 PrimaryApplicationTagMask; /* 0x3A */
U32 RelativeOffset; /* 0x3C */
U32 Reserved5; /* 0x40 */
U32 Reserved6; /* 0x44 */
U32 Reserved7; /* 0x48 */
U32 Reserved8; /* 0x4C */
MPI2_SGE_IO_UNION SGL[1]; /* 0x50 */
} MPI2_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI2_TARGET_ASSIST_REQUEST,
Mpi2TargetAssistRequest_t, MPI2_POINTER pMpi2TargetAssistRequest_t;
/* Target Assist TargetAssistFlags bits */
#define MPI2_TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
#define MPI2_TARGET_ASSIST_FLAGS_TLR (0x10)
#define MPI2_TARGET_ASSIST_FLAGS_RETRANSMIT (0x04)
#define MPI2_TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
#define MPI2_TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
/* Target Assist SGLFlags bits */
/* base values for Data Location Address Space */
#define MPI2_TARGET_ASSIST_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_TARGET_ASSIST_SGLFLAGS_PLBNTA_ADDR (0x0C)
/* base values for Type */
#define MPI2_TARGET_ASSIST_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_TARGET_ASSIST_SGLFLAGS_MPI_TYPE (0x00)
#define MPI2_TARGET_ASSIST_SGLFLAGS_32IEEE_TYPE (0x01)
#define MPI2_TARGET_ASSIST_SGLFLAGS_64IEEE_TYPE (0x02)
/* shift values for each sub-field */
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL0_SHIFT (0)
/* Target Assist IoFlags bits */
#define MPI2_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_TARGET_ASSIST_IOFLAGS_MULTICAST (0x0400)
#define MPI2_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200)
/* Target Assist EEDPFlags bits */
#define MPI2_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_TA_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_TA_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_TA_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_TA_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_TA_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_TA_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_TA_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_TA_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_TA_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/****************************************************************************
* MPI v2.5 Target Assist Request
****************************************************************************/
typedef struct _MPI25_TARGET_ASSIST_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 TargetAssistFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U8 DMAFlags; /* 0x10 */
U8 Reserved9; /* 0x11 */
U8 SequenceNumber; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U16 EEDPBlockSize; /* 0x28 */
U16 Reserved10; /* 0x2A */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U32 PrimaryReferenceTag; /* 0x34 */
U16 PrimaryApplicationTag; /* 0x38 */
U16 PrimaryApplicationTagMask; /* 0x3A */
U32 RelativeOffset; /* 0x3C */
U32 Reserved5; /* 0x40 */
U32 Reserved6; /* 0x44 */
U32 Reserved7; /* 0x48 */
U32 Reserved8; /* 0x4C */
MPI25_SGE_IO_UNION SGL; /* 0x50 */
} MPI25_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI25_TARGET_ASSIST_REQUEST,
Mpi25TargetAssistRequest_t, MPI2_POINTER pMpi25TargetAssistRequest_t;
/* use MPI2_TARGET_ASSIST_FLAGS_ defines for the Flags field */
/* Defines for the DMAFlags field
* Each setting affects 4 SGLS, from SGL0 to SGL3.
* D = Data
* C = Cache DIF
* I = Interleaved
* H = Host DIF
*/
#define MPI25_TA_DMAFLAGS_OP_MASK (0x0F)
#define MPI25_TA_DMAFLAGS_OP_D_D_D_D (0x00)
#define MPI25_TA_DMAFLAGS_OP_D_D_D_C (0x01)
#define MPI25_TA_DMAFLAGS_OP_D_D_D_I (0x02)
#define MPI25_TA_DMAFLAGS_OP_D_D_C_C (0x03)
#define MPI25_TA_DMAFLAGS_OP_D_D_C_I (0x04)
#define MPI25_TA_DMAFLAGS_OP_D_D_I_I (0x05)
#define MPI25_TA_DMAFLAGS_OP_D_C_C_C (0x06)
#define MPI25_TA_DMAFLAGS_OP_D_C_C_I (0x07)
#define MPI25_TA_DMAFLAGS_OP_D_C_I_I (0x08)
#define MPI25_TA_DMAFLAGS_OP_D_I_I_I (0x09)
#define MPI25_TA_DMAFLAGS_OP_D_H_D_D (0x0A)
#define MPI25_TA_DMAFLAGS_OP_D_H_D_C (0x0B)
#define MPI25_TA_DMAFLAGS_OP_D_H_D_I (0x0C)
#define MPI25_TA_DMAFLAGS_OP_D_H_C_C (0x0D)
#define MPI25_TA_DMAFLAGS_OP_D_H_C_I (0x0E)
#define MPI25_TA_DMAFLAGS_OP_D_H_I_I (0x0F)
/* defines for the IoFlags field */
#define MPI25_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI25_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200)
/* defines for the EEDPFlags field */
#define MPI25_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI25_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI25_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI25_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI25_TA_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI25_TA_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI25_TA_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI25_TA_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
#define MPI25_TA_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
#define MPI25_TA_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
#define MPI25_TA_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
#define MPI25_TA_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
#define MPI25_TA_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
#define MPI25_TA_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
#define MPI25_TA_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
#define MPI25_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI25_TA_EEDPFLAGS_MASK_OP (0x0007)
#define MPI25_TA_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI25_TA_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI25_TA_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI25_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI25_TA_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI25_TA_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI25_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/****************************************************************************
* Target Status Send Request
****************************************************************************/
typedef struct _MPI2_TARGET_STATUS_SEND_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 StatusFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U16 SGLFlags; /* 0x10 */ /* MPI v2.0 only. Reserved on MPI v2.5. */
U16 Reserved4; /* 0x12 */
U8 SGLOffset0; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 Reserved6; /* 0x16 */
U32 Reserved7; /* 0x18 */
U32 Reserved8; /* 0x1C */
MPI2_SIMPLE_SGE_UNION StatusDataSGE; /* 0x20 */ /* MPI v2.5: This must be an IEEE Simple Element 64. */
} MPI2_TARGET_STATUS_SEND_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_STATUS_SEND_REQUEST,
Mpi2TargetStatusSendRequest_t, MPI2_POINTER pMpi2TargetStatusSendRequest_t;
/* Target Status Send StatusFlags bits */
#define MPI2_TSS_FLAGS_REPOST_CMD_BUFFER (0x80)
#define MPI2_TSS_FLAGS_RETRANSMIT (0x04)
#define MPI2_TSS_FLAGS_AUTO_GOOD_STATUS (0x01)
/* Target Status Send SGLFlags bits - MPI v2.0 only */
/* Data Location Address Space */
#define MPI2_TSS_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_TSS_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_TSS_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_TSS_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_TSS_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/* Type */
#define MPI2_TSS_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_TSS_SGLFLAGS_MPI_TYPE (0x00)
#define MPI2_TSS_SGLFLAGS_IEEE32_TYPE (0x01)
#define MPI2_TSS_SGLFLAGS_IEEE64_TYPE (0x02)
/*
* NOTE: The SSP status IU is big-endian. When used on a little-endian system,
* this structure properly orders the bytes.
*/
typedef struct _MPI2_TARGET_SSP_RSP_IU
{
U32 Reserved0[6]; /* reserved for SSP header */ /* 0x00 */
/* start of RESPONSE information unit */
U32 Reserved1; /* 0x18 */
U32 Reserved2; /* 0x1C */
U16 Reserved3; /* 0x20 */
U8 DataPres; /* lower 2 bits */ /* 0x22 */
U8 Status; /* 0x23 */
U32 Reserved4; /* 0x24 */
U32 SenseDataLength; /* 0x28 */
U32 ResponseDataLength; /* 0x2C */
/* start of Response or Sense Data (size may vary dynamically) */
U8 ResponseSenseData[4]; /* 0x30 */
} MPI2_TARGET_SSP_RSP_IU, MPI2_POINTER PTR_MPI2_TARGET_SSP_RSP_IU,
Mpi2TargetSspRspIu_t, MPI2_POINTER pMpi2TargetSspRspIu_t;
/****************************************************************************
* Target Standard Reply - used with Target Assist or Target Status Send
****************************************************************************/
typedef struct _MPI2_TARGET_STANDARD_REPLY
{
U16 Reserved; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U16 IoIndex; /* 0x14 */
U16 Reserved5; /* 0x16 */
U32 TransferCount; /* 0x18 */
U32 BidirectionalTransferCount; /* 0x1C */
} MPI2_TARGET_STANDARD_REPLY, MPI2_POINTER PTR_MPI2_TARGET_STANDARD_REPLY,
Mpi2TargetErrorReply_t, MPI2_POINTER pMpi2TargetErrorReply_t;
/****************************************************************************
* Target Mode Abort Request
****************************************************************************/
typedef struct _MPI2_TARGET_MODE_ABORT_REQUEST
{
U8 AbortType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 IoIndexToAbort; /* 0x0C */
U16 Reserved6; /* 0x0E */
U32 MidToAbort; /* 0x10 */
} MPI2_TARGET_MODE_ABORT, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT,
Mpi2TargetModeAbort_t, MPI2_POINTER pMpi2TargetModeAbort_t;
/* Target Mode Abort AbortType values */
#define MPI2_TARGET_MODE_ABORT_ALL_CMD_BUFFERS (0x00)
#define MPI2_TARGET_MODE_ABORT_ALL_IO (0x01)
#define MPI2_TARGET_MODE_ABORT_EXACT_IO (0x02)
#define MPI2_TARGET_MODE_ABORT_EXACT_IO_REQUEST (0x03)
#define MPI2_TARGET_MODE_ABORT_IO_REQUEST_AND_IO (0x04)
/****************************************************************************
* Target Mode Abort Reply
****************************************************************************/
typedef struct _MPI2_TARGET_MODE_ABORT_REPLY
{
U16 Reserved; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 AbortCount; /* 0x14 */
} MPI2_TARGET_MODE_ABORT_REPLY, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT_REPLY,
Mpi2TargetModeAbortReply_t, MPI2_POINTER pMpi2TargetModeAbortReply_t;
#endif

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source/lsi/mpi2_tool.h Executable file
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/*
* Copyright (c) 2000-2010 LSI Corporation.
*
*
* Name: mpi2_tool.h
* Title: MPI diagnostic tool structures and definitions
* Creation Date: March 26, 2007
*
* mpi2_tool.h Version: 02.00.06
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* 05-12-10 02.00.05 Added Diagnostic Data Upload tool.
* 08-11-10 02.00.06 Added defines that were missing for Diagnostic Buffer
* Post Request.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TOOL_H
#define MPI2_TOOL_H
/*****************************************************************************
*
* Toolbox Messages
*
*****************************************************************************/
/* defines for the Tools */
#define MPI2_TOOLBOX_CLEAN_TOOL (0x00)
#define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
#define MPI2_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
#define MPI2_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI2_TOOLBOX_BEACON_TOOL (0x05)
#define MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL (0x06)
/****************************************************************************
* Toolbox reply
****************************************************************************/
typedef struct _MPI2_TOOLBOX_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_TOOLBOX_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_REPLY,
Mpi2ToolboxReply_t, MPI2_POINTER pMpi2ToolboxReply_t;
/****************************************************************************
* Toolbox Clean Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Flags; /* 0x0C */
} MPI2_TOOLBOX_CLEAN_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_CLEAN_REQUEST,
Mpi2ToolboxCleanRequest_t, MPI2_POINTER pMpi2ToolboxCleanRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
#define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000)
#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000)
#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004)
#define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002)
#define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001)
/****************************************************************************
* Toolbox Memory Move request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x0C */
} MPI2_TOOLBOX_MEM_MOVE_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST,
Mpi2ToolboxMemMoveRequest_t, MPI2_POINTER pMpi2ToolboxMemMoveRequest_t;
/****************************************************************************
* Toolbox Diagnostic Data Upload request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 SGLFlags; /* 0x0C */
U8 Reserved5; /* 0x0D */
U16 Reserved6; /* 0x0E */
U32 Flags; /* 0x10 */
U32 DataLength; /* 0x14 */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x18 */
} MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
Mpi2ToolboxDiagDataUploadRequest_t,
MPI2_POINTER pMpi2ToolboxDiagDataUploadRequest_t;
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
typedef struct _MPI2_DIAG_DATA_UPLOAD_HEADER
{
U32 DiagDataLength; /* 00h */
U8 FormatCode; /* 04h */
U8 Reserved1; /* 05h */
U16 Reserved2; /* 06h */
} MPI2_DIAG_DATA_UPLOAD_HEADER, MPI2_POINTER PTR_MPI2_DIAG_DATA_UPLOAD_HEADER,
Mpi2DiagDataUploadHeader_t, MPI2_POINTER pMpi2DiagDataUploadHeader_t;
/****************************************************************************
* Toolbox ISTWI Read Write Tool
****************************************************************************/
/* Toolbox ISTWI Read Write Tool request message */
typedef struct _MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Reserved5; /* 0x0C */
U32 Reserved6; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 SGLFlags; /* 0x16 */
U8 Reserved7; /* 0x17 */
U16 TxDataLength; /* 0x18 */
U16 RxDataLength; /* 0x1A */
U32 Reserved8; /* 0x1C */
U32 Reserved9; /* 0x20 */
U32 Reserved10; /* 0x24 */
U32 Reserved11; /* 0x28 */
U32 Reserved12; /* 0x2C */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x30 */
} MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
Mpi2ToolboxIstwiReadWriteRequest_t,
MPI2_POINTER pMpi2ToolboxIstwiReadWriteRequest_t;
/* values for the Action field */
#define MPI2_TOOL_ISTWI_ACTION_READ_DATA (0x01)
#define MPI2_TOOL_ISTWI_ACTION_WRITE_DATA (0x02)
#define MPI2_TOOL_ISTWI_ACTION_SEQUENCE (0x03)
#define MPI2_TOOL_ISTWI_ACTION_RESERVE_BUS (0x10)
#define MPI2_TOOL_ISTWI_ACTION_RELEASE_BUS (0x11)
#define MPI2_TOOL_ISTWI_ACTION_RESET (0x12)
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* Toolbox ISTWI Read Write Tool reply message */
typedef struct _MPI2_TOOLBOX_ISTWI_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 IstwiStatus; /* 0x16 */
U8 Reserved6; /* 0x17 */
U16 TxDataCount; /* 0x18 */
U16 RxDataCount; /* 0x1A */
} MPI2_TOOLBOX_ISTWI_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_REPLY,
Mpi2ToolboxIstwiReply_t, MPI2_POINTER pMpi2ToolboxIstwiReply_t;
/****************************************************************************
* Toolbox Beacon Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_BEACON_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 Reserved5; /* 0x0C */
U8 PhysicalPort; /* 0x0D */
U8 Reserved6; /* 0x0E */
U8 Flags; /* 0x0F */
} MPI2_TOOLBOX_BEACON_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_BEACON_REQUEST,
Mpi2ToolboxBeaconRequest_t, MPI2_POINTER pMpi2ToolboxBeaconRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00)
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01)
/****************************************************************************
* Toolbox Diagnostic CLI Tool
****************************************************************************/
#define MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH (0x5C)
/* Toolbox Diagnostic CLI Tool request message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 SGLFlags; /* 0x0C */
U8 Reserved5; /* 0x0D */
U16 Reserved6; /* 0x0E */
U32 DataLength; /* 0x10 */
U8 DiagnosticCliCommand[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH]; /* 0x14 */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x70 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
Mpi2ToolboxDiagnosticCliRequest_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliRequest_t;
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* Toolbox Diagnostic CLI Tool reply message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ReturnedDataLength; /* 0x14 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_CLI_REPLY,
Mpi2ToolboxDiagnosticCliReply_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliReply_t;
/*****************************************************************************
*
* Diagnostic Buffer Messages
*
*****************************************************************************/
/****************************************************************************
* Diagnostic Buffer Post request
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U64 BufferAddress; /* 0x0C */
U32 BufferLength; /* 0x14 */
U32 Reserved5; /* 0x18 */
U32 Reserved6; /* 0x1C */
U32 Flags; /* 0x20 */
U32 ProductSpecific[23]; /* 0x24 */
} MPI2_DIAG_BUFFER_POST_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REQUEST,
Mpi2DiagBufferPostRequest_t, MPI2_POINTER pMpi2DiagBufferPostRequest_t;
/* values for the ExtendedType field */
#define MPI2_DIAG_EXTENDED_TYPE_UTILIZATION (0x02)
/* values for the BufferType field */
#define MPI2_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI2_DIAG_BUF_TYPE_EXTENDED (0x02)
/* count of the number of buffer types */
#define MPI2_DIAG_BUF_TYPE_COUNT (0x03)
/* values for the Flags field */
#define MPI2_DIAG_BUF_FLAG_RELEASE_ON_FULL (0x00000002) /* for MPI v2.0 products only */
#define MPI2_DIAG_BUF_FLAG_IMMEDIATE_RELEASE (0x00000001)
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REPLY
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferLength; /* 0x14 */
} MPI2_DIAG_BUFFER_POST_REPLY, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REPLY,
Mpi2DiagBufferPostReply_t, MPI2_POINTER pMpi2DiagBufferPostReply_t;
/****************************************************************************
* Diagnostic Release request
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
} MPI2_DIAG_RELEASE_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REQUEST,
Mpi2DiagReleaseRequest_t, MPI2_POINTER pMpi2DiagReleaseRequest_t;
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REPLY
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_DIAG_RELEASE_REPLY, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REPLY,
Mpi2DiagReleaseReply_t, MPI2_POINTER pMpi2DiagReleaseReply_t;
#endif

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/*
* Copyright (c) 2000-2007 LSI Corporation.
*
*
* Name: mpi2_type.h
* Title: MPI basic type definitions
* Creation Date: August 16, 2006
*
* mpi2_type.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TYPE_H
#define MPI2_TYPE_H
/*******************************************************************************
* Define MPI2_POINTER if it hasn't already been defined. By default
* MPI2_POINTER is defined to be a near pointer. MPI2_POINTER can be defined as
* a far pointer by defining MPI2_POINTER as "far *" before this header file is
* included.
*/
#ifndef MPI2_POINTER
#define MPI2_POINTER *
#endif
/* the basic types may have already been included by mpi_type.h */
#ifndef MPI_TYPE_H
/*****************************************************************************
*
* Basic Types
*
*****************************************************************************/
typedef signed char S8;
typedef unsigned char U8;
typedef signed short S16;
typedef unsigned short U16;
#if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__PPC__) || defined(__ppc)
typedef signed int S32;
typedef unsigned int U32;
#else
typedef signed long S32;
typedef unsigned long U32;
#endif
typedef struct _S64
{
U32 Low;
S32 High;
} S64;
typedef struct _U64
{
U32 Low;
U32 High;
} U64;
/*****************************************************************************
*
* Pointer Types
*
*****************************************************************************/
typedef S8 *PS8;
typedef U8 *PU8;
typedef S16 *PS16;
typedef U16 *PU16;
typedef S32 *PS32;
typedef U32 *PU32;
typedef S64 *PS64;
typedef U64 *PU64;
#endif
#endif

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source/lsi/mpi_fc.h Executable file
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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_fc.h
* Title: MPI Fibre Channel messages and structures
* Creation Date: June 12, 2000
*
* mpi_fc.h Version: 01.05.01
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-12-00 01.00.02 Added _MSG_FC_ABORT_REPLY structure.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 12-04-00 01.01.02 Added messages for Common Transport Send and
* Primitive Send.
* 01-09-01 01.01.03 Modifed some of the new flags to have an MPI prefix
* and modified the FcPrimitiveSend flags.
* 01-25-01 01.01.04 Move InitiatorIndex in LinkServiceRsp reply to a larger
* field.
* Added FC_ABORT_TYPE_CT_SEND_REQUEST and
* FC_ABORT_TYPE_EXLINKSEND_REQUEST for FcAbort request.
* Added MPI_FC_PRIM_SEND_FLAGS_STOP_SEND.
* 02-20-01 01.01.05 Started using MPI_POINTER.
* 03-27-01 01.01.06 Added Flags field to MSG_LINK_SERVICE_BUFFER_POST_REPLY
* and defined MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED.
* Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define.
* Added structure offset comments.
* 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 09-28-01 01.02.02 Change name of reserved field in
* MSG_LINK_SERVICE_RSP_REPLY.
* 05-31-02 01.02.03 Adding AliasIndex to FC Direct Access requests.
* 01-16-04 01.02.04 Added define for MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
#ifndef MPI_FC_H
#define MPI_FC_H
/*****************************************************************************
*
* F C D i r e c t A c c e s s M e s s a g e s
*
*****************************************************************************/
/****************************************************************************/
/* Link Service Buffer Post messages */
/****************************************************************************/
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REQUEST
{
U8 BufferPostFlags; /* 00h */
U8 BufferCount; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
SGE_TRANS_SIMPLE_UNION SGL;
} MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
LinkServiceBufferPostRequest_t, MPI_POINTER pLinkServiceBufferPostRequest_t;
#define LINK_SERVICE_BUFFER_POST_FLAGS_PORT_MASK (0x01)
typedef struct _WWNFORMAT
{
U32 PortNameHigh; /* 00h */
U32 PortNameLow; /* 04h */
U32 NodeNameHigh; /* 08h */
U32 NodeNameLow; /* 0Ch */
} WWNFORMAT,
WwnFormat_t;
/* Link Service Buffer Post Reply */
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REPLY
{
U8 Flags; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 PortNumber; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved2; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferLength; /* 14h */
U32 TransactionContext; /* 18h */
U32 Rctl_Did; /* 1Ch */
U32 Csctl_Sid; /* 20h */
U32 Type_Fctl; /* 24h */
U16 SeqCnt; /* 28h */
U8 Dfctl; /* 2Ah */
U8 SeqId; /* 2Bh */
U16 Rxid; /* 2Ch */
U16 Oxid; /* 2Eh */
U32 Parameter; /* 30h */
WWNFORMAT Wwn; /* 34h */
} MSG_LINK_SERVICE_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REPLY,
LinkServiceBufferPostReply_t, MPI_POINTER pLinkServiceBufferPostReply_t;
#define MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED (0x80)
#define MPI_FC_DID_MASK (0x00FFFFFF)
#define MPI_FC_DID_SHIFT (0)
#define MPI_FC_RCTL_MASK (0xFF000000)
#define MPI_FC_RCTL_SHIFT (24)
#define MPI_FC_SID_MASK (0x00FFFFFF)
#define MPI_FC_SID_SHIFT (0)
#define MPI_FC_CSCTL_MASK (0xFF000000)
#define MPI_FC_CSCTL_SHIFT (24)
#define MPI_FC_FCTL_MASK (0x00FFFFFF)
#define MPI_FC_FCTL_SHIFT (0)
#define MPI_FC_TYPE_MASK (0xFF000000)
#define MPI_FC_TYPE_SHIFT (24)
/* obsolete name for the above */
#define FCP_TARGET_DID_MASK (0x00FFFFFF)
#define FCP_TARGET_DID_SHIFT (0)
#define FCP_TARGET_RCTL_MASK (0xFF000000)
#define FCP_TARGET_RCTL_SHIFT (24)
#define FCP_TARGET_SID_MASK (0x00FFFFFF)
#define FCP_TARGET_SID_SHIFT (0)
#define FCP_TARGET_CSCTL_MASK (0xFF000000)
#define FCP_TARGET_CSCTL_SHIFT (24)
#define FCP_TARGET_FCTL_MASK (0x00FFFFFF)
#define FCP_TARGET_FCTL_SHIFT (0)
#define FCP_TARGET_TYPE_MASK (0xFF000000)
#define FCP_TARGET_TYPE_SHIFT (24)
/****************************************************************************/
/* Link Service Response messages */
/****************************************************************************/
typedef struct _MSG_LINK_SERVICE_RSP_REQUEST
{
U8 RspFlags; /* 00h */
U8 RspLength; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Rctl_Did; /* 0Ch */
U32 Csctl_Sid; /* 10h */
U32 Type_Fctl; /* 14h */
U16 SeqCnt; /* 18h */
U8 Dfctl; /* 1Ah */
U8 SeqId; /* 1Bh */
U16 Rxid; /* 1Ch */
U16 Oxid; /* 1Eh */
U32 Parameter; /* 20h */
SGE_SIMPLE_UNION SGL; /* 24h */
} MSG_LINK_SERVICE_RSP_REQUEST, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REQUEST,
LinkServiceRspRequest_t, MPI_POINTER pLinkServiceRspRequest_t;
#define LINK_SERVICE_RSP_FLAGS_IMMEDIATE (0x80)
#define LINK_SERVICE_RSP_FLAGS_PORT_MASK (0x01)
/* Link Service Response Reply */
typedef struct _MSG_LINK_SERVICE_RSP_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved_0100_InitiatorIndex; /* 06h */ /* obsolete InitiatorIndex */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 InitiatorIndex; /* 14h */
} MSG_LINK_SERVICE_RSP_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REPLY,
LinkServiceRspReply_t, MPI_POINTER pLinkServiceRspReply_t;
/****************************************************************************/
/* Extended Link Service Send messages */
/****************************************************************************/
typedef struct _MSG_EXLINK_SERVICE_SEND_REQUEST
{
U8 SendFlags; /* 00h */
U8 AliasIndex; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U32 MsgFlags_Did; /* 04h */
U32 MsgContext; /* 08h */
U32 ElsCommandCode; /* 0Ch */
SGE_SIMPLE_UNION SGL; /* 10h */
} MSG_EXLINK_SERVICE_SEND_REQUEST, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REQUEST,
ExLinkServiceSendRequest_t, MPI_POINTER pExLinkServiceSendRequest_t;
#define EX_LINK_SERVICE_SEND_DID_MASK (0x00FFFFFF)
#define EX_LINK_SERVICE_SEND_DID_SHIFT (0)
#define EX_LINK_SERVICE_SEND_MSGFLAGS_MASK (0xFF000000)
#define EX_LINK_SERVICE_SEND_MSGFLAGS_SHIFT (24)
/* Extended Link Service Send Reply */
typedef struct _MSG_EXLINK_SERVICE_SEND_REPLY
{
U8 Reserved; /* 00h */
U8 AliasIndex; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 ResponseLength; /* 14h */
} MSG_EXLINK_SERVICE_SEND_REPLY, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REPLY,
ExLinkServiceSendReply_t, MPI_POINTER pExLinkServiceSendReply_t;
/****************************************************************************/
/* FC Abort messages */
/****************************************************************************/
typedef struct _MSG_FC_ABORT_REQUEST
{
U8 AbortFlags; /* 00h */
U8 AbortType; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 TransactionContextToAbort; /* 0Ch */
} MSG_FC_ABORT_REQUEST, MPI_POINTER PTR_MSG_FC_ABORT_REQUEST,
FcAbortRequest_t, MPI_POINTER pFcAbortRequest_t;
#define FC_ABORT_FLAG_PORT_MASK (0x01)
#define FC_ABORT_TYPE_ALL_FC_BUFFERS (0x00)
#define FC_ABORT_TYPE_EXACT_FC_BUFFER (0x01)
#define FC_ABORT_TYPE_CT_SEND_REQUEST (0x02)
#define FC_ABORT_TYPE_EXLINKSEND_REQUEST (0x03)
/* FC Abort Reply */
typedef struct _MSG_FC_ABORT_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_FC_ABORT_REPLY, MPI_POINTER PTR_MSG_FC_ABORT_REPLY,
FcAbortReply_t, MPI_POINTER pFcAbortReply_t;
/****************************************************************************/
/* FC Common Transport Send messages */
/****************************************************************************/
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REQUEST
{
U8 SendFlags; /* 00h */
U8 AliasIndex; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U32 MsgFlags_Did; /* 04h */
U32 MsgContext; /* 08h */
U16 CTCommandCode; /* 0Ch */
U8 FsType; /* 0Eh */
U8 Reserved1; /* 0Fh */
SGE_SIMPLE_UNION SGL; /* 10h */
} MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
FcCommonTransportSendRequest_t, MPI_POINTER pFcCommonTransportSendRequest_t;
#define MPI_FC_CT_SEND_DID_MASK (0x00FFFFFF)
#define MPI_FC_CT_SEND_DID_SHIFT (0)
#define MPI_FC_CT_SEND_MSGFLAGS_MASK (0xFF000000)
#define MPI_FC_CT_SEND_MSGFLAGS_SHIFT (24)
/* FC Common Transport Send Reply */
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REPLY
{
U8 Reserved; /* 00h */
U8 AliasIndex; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 ResponseLength; /* 14h */
} MSG_FC_COMMON_TRANSPORT_SEND_REPLY, MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REPLY,
FcCommonTransportSendReply_t, MPI_POINTER pFcCommonTransportSendReply_t;
/****************************************************************************/
/* FC Primitive Send messages */
/****************************************************************************/
typedef struct _MSG_FC_PRIMITIVE_SEND_REQUEST
{
U8 SendFlags; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 FcPrimitive[4]; /* 0Ch */
} MSG_FC_PRIMITIVE_SEND_REQUEST, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REQUEST,
FcPrimitiveSendRequest_t, MPI_POINTER pFcPrimitiveSendRequest_t;
#define MPI_FC_PRIM_SEND_FLAGS_PORT_MASK (0x01)
#define MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK (0x02)
#define MPI_FC_PRIM_SEND_FLAGS_RESET_LINK (0x04)
#define MPI_FC_PRIM_SEND_FLAGS_STOP_SEND (0x08)
#define MPI_FC_PRIM_SEND_FLAGS_SEND_ONCE (0x10)
#define MPI_FC_PRIM_SEND_FLAGS_SEND_AROUND (0x20)
#define MPI_FC_PRIM_SEND_FLAGS_UNTIL_FULL (0x40)
#define MPI_FC_PRIM_SEND_FLAGS_FOREVER (0x80)
/* FC Primitive Send Reply */
typedef struct _MSG_FC_PRIMITIVE_SEND_REPLY
{
U8 SendFlags; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_FC_PRIMITIVE_SEND_REPLY, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REPLY,
FcPrimitiveSendReply_t, MPI_POINTER pFcPrimitiveSendReply_t;
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_init.h
* Title: MPI initiator mode messages and structures
* Creation Date: June 8, 2000
*
* mpi_init.h Version: 01.05.09
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions.
* 11-02-00 01.01.01 Original release for post 1.0 work.
* 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
* 02-20-01 01.01.03 Started using MPI_POINTER.
* 03-27-01 01.01.04 Added structure offset comments.
* 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
* Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
* MSG_SCSI_IO_REPLY.
* 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure
* Processor messages.
* 10-04-01 01.02.04 Added defines for SEP request Action field.
* 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define
* for SCSI IO requests.
* 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
* 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request.
* Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
* and a reserved U16.
* Added new MSG_SCSI_IO32_REQUEST structure.
* Added a TaskType of Clear Task Set to SCSI
* Task Management request.
* 12-07-04 01.05.02 Added support for Task Management Query Task.
* 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support
* WWID addressing.
* 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request.
* Removed SCSI IO 32 Request.
* Modified SCSI Enclosure Processor Request and Reply to
* support Enclosure/Slot addressing rather than WWID
* addressing.
* 06-24-05 01.05.05 Added SCSI IO 32 structures and defines.
* Added four new defines for SEP SlotStatus.
* 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them
* unique in the first 32 characters.
* 03-27-06 01.05.07 Added Task Management type of Clear ACA.
* 10-11-06 01.05.08 Shortened define for Task Management type of Clear ACA.
* 02-28-07 01.05.09 Defined two new MsgFlags bits for SCSI Task Management
* Request: Do Not Send Task IU and Soft Reset Option.
* --------------------------------------------------------------------------
*/
#ifndef MPI_INIT_H
#define MPI_INIT_H
/*****************************************************************************
*
* S C S I I n i t i a t o r M e s s a g e s
*
*****************************************************************************/
/****************************************************************************/
/* SCSI IO messages and associated structures */
/****************************************************************************/
typedef struct _MSG_SCSI_IO_REQUEST
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 AliasIndex; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Control; /* 14h */
U8 CDB[16]; /* 18h */
U32 DataLength; /* 28h */
U32 SenseBufferLowAddr; /* 2Ch */
SGE_IO_UNION SGL; /* 30h */
} MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
/* SCSI IO MsgFlags bits */
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
/* SCSI IO LUN fields */
#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
#define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
/* SCSI IO Control bits */
#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI_SCSIIO_CONTROL_READ (0x02000000)
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
#define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
#define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
#define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
#define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
#define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
/* SCSI IO reply structure */
typedef struct _MSG_SCSI_IO_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 AliasIndex; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 SCSIStatus; /* 0Ch */
U8 SCSIState; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
U16 TaskTag; /* 20h */
U16 Reserved1; /* 22h */
} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
/* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */
#define MPI_SCSI_STATUS_SUCCESS (0x00)
#define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI_SCSI_STATUS_BUSY (0x08)
#define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
#define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80)
#define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81)
#define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82)
/* SCSI IO Reply SCSIState values */
#define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
#define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI_SCSI_STATE_TERMINATED (0x08)
#define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
/* SCSI IO Reply ResponseInfo values */
/* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */
#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
#define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************/
/* SCSI IO 32 messages and associated structures */
/****************************************************************************/
typedef struct
{
U8 CDB[20]; /* 00h */
U32 PrimaryReferenceTag; /* 14h */
U16 PrimaryApplicationTag; /* 18h */
U16 PrimaryApplicationTagMask; /* 1Ah */
U32 TransferLength; /* 1Ch */
} MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32,
MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t;
typedef struct
{
U8 CDB[16]; /* 00h */
U32 DataLength; /* 10h */
U32 PrimaryReferenceTag; /* 14h */
U16 PrimaryApplicationTag; /* 18h */
U16 PrimaryApplicationTagMask; /* 1Ah */
U32 TransferLength; /* 1Ch */
} MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16,
MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t;
typedef union
{
U8 CDB32[32];
MPI_SCSI_IO32_CDB_EEDP32 EEDP32;
MPI_SCSI_IO32_CDB_EEDP16 EEDP16;
SGE_SIMPLE_UNION SGE;
} MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION,
MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t;
typedef struct
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U16 Reserved1; /* 02h */
U32 Reserved2; /* 04h */
} MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM,
MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t;
typedef union
{
MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID;
U64 WWID;
} MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS,
MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t;
typedef struct _MSG_SCSI_IO32_REQUEST
{
U8 Port; /* 00h */
U8 AliasIndex; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Flags; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Control; /* 14h */
MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */
U32 DataLength; /* 38h */
U32 BidirectionalDataLength; /* 3Ch */
U32 SecondaryReferenceTag; /* 40h */
U16 SecondaryApplicationTag; /* 44h */
U16 Reserved2; /* 46h */
U16 EEDPFlags; /* 48h */
U16 ApplicationTagTranslationMask; /* 4Ah */
U32 EEDPBlockSize; /* 4Ch */
MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */
U8 SGLOffset0; /* 58h */
U8 SGLOffset1; /* 59h */
U8 SGLOffset2; /* 5Ah */
U8 SGLOffset3; /* 5Bh */
U32 Reserved3; /* 5Ch */
U32 Reserved4; /* 60h */
U32 SenseBufferLowAddr; /* 64h */
SGE_IO_UNION SGL; /* 68h */
} MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
/* SCSI IO 32 MsgFlags bits */
#define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01)
#define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00)
#define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01)
#define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02)
#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00)
#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02)
#define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
#define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08)
#define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10)
#define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20)
#define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40)
/* SCSI IO 32 Flags bits */
#define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03)
#define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00)
#define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01)
/* SCSI IO 32 LUN fields */
#define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00)
#define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00)
/* SCSI IO 32 Control bits */
#define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000)
#define MPI_SCSIIO32_CONTROL_WRITE (0x01000000)
#define MPI_SCSIIO32_CONTROL_READ (0x02000000)
#define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000)
#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000)
#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000)
#define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100)
#define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200)
#define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400)
#define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500)
#define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700)
#define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000)
#define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000)
#define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000)
#define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000)
#define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000)
#define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000)
#define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000)
#define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000)
#define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000)
/* SCSI IO 32 EEDPFlags */
#define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007)
#define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001)
#define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003)
#define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007)
#define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008)
#define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8)
#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
/* SCSIIO32 IO reply structure */
typedef struct _MSG_SCSIIO32_IO_REPLY
{
U8 Port; /* 00h */
U8 AliasIndex; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Flags; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 SCSIStatus; /* 0Ch */
U8 SCSIState; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
U16 TaskTag; /* 20h */
U16 Reserved2; /* 22h */
U32 BidirectionalTransferCount; /* 24h */
} MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY,
SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t;
/****************************************************************************/
/* SCSI Task Management messages */
/****************************************************************************/
typedef struct _MSG_SCSI_TASK_MGMT
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 Reserved; /* 04h */
U8 TaskType; /* 05h */
U8 AliasIndex; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Reserved2[7]; /* 14h */
U32 TaskMsgContext; /* 30h */
} MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
/* TaskType values */
#define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
/* MsgFlags bits */
#define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
#define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
#define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
#define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION (0x08)
/* SCSI Task Management Reply */
typedef struct _MSG_SCSI_TASK_MGMT_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 ResponseCode; /* 04h */
U8 TaskType; /* 05h */
U8 AliasIndex; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2[2]; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TerminationCount; /* 14h */
} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
/* ResponseCode values */
#define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
#define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
#define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
#define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05)
#define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
#define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
#define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
/****************************************************************************/
/* SCSI Enclosure Processor messages */
/****************************************************************************/
typedef struct _MSG_SEP_REQUEST
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 Action; /* 04h */
U8 Flags; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 SlotStatus; /* 0Ch */
U32 Reserved2; /* 10h */
U32 Reserved3; /* 14h */
U32 Reserved4; /* 18h */
U16 Slot; /* 1Ch */
U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
SEPRequest_t, MPI_POINTER pSEPRequest_t;
/* Action defines */
#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
/* Flags defines */
#define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
#define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00)
/* SlotStatus bits for MSG_SEP_REQUEST */
#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
#define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000)
#define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000)
#define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000)
#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
#define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000)
#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
#define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
typedef struct _MSG_SEP_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 Action; /* 04h */
U8 Reserved1; /* 05h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 SlotStatus; /* 14h */
U32 Reserved4; /* 18h */
U16 Slot; /* 1Ch */
U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
SEPReply_t, MPI_POINTER pSEPReply_t;
/* SlotStatus bits for MSG_SEP_REPLY */
#define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
#define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000)
#define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000)
#define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000)
#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
#define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
#define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
#define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
#define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
#endif

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source/lsi/mpi_raid.h Executable file
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/*
* Copyright (c) 2001-2008 LSI Corporation.
*
*
* Name: mpi_raid.h
* Title: MPI RAID message and structures
* Creation Date: February 27, 2001
*
* mpi_raid.h Version: 01.05.05
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 02-27-01 01.01.01 Original release for this file.
* 03-27-01 01.01.02 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 09-28-01 01.02.02 Major rework for MPI v1.2 Integrated RAID changes.
* 10-04-01 01.02.03 Added ActionData defines for
* MPI_RAID_ACTION_DELETE_VOLUME action.
* 11-01-01 01.02.04 Added define for MPI_RAID_ACTION_ADATA_DO_NOT_SYNC.
* 03-14-02 01.02.05 Added define for MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT.
* 05-07-02 01.02.06 Added define for MPI_RAID_ACTION_ACTIVATE_VOLUME,
* MPI_RAID_ACTION_INACTIVATE_VOLUME, and
* MPI_RAID_ACTION_ADATA_INACTIVATE_ALL.
* 07-12-02 01.02.07 Added structures for Mailbox request and reply.
* 11-15-02 01.02.08 Added missing MsgContext field to MSG_MAILBOX_REQUEST.
* 04-01-03 01.02.09 New action data option flag for
* MPI_RAID_ACTION_DELETE_VOLUME.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 01-15-05 01.05.02 Added defines for the two new RAID Actions for
* _SET_RESYNC_RATE and _SET_DATA_SCRUB_RATE.
* 02-28-07 01.05.03 Added new RAID Action, Device FW Update Mode, and
* associated defines.
* 08-07-07 01.05.04 Added Disable Full Rebuild bit to the ActionDataWord
* for the RAID Action MPI_RAID_ACTION_DISABLE_VOLUME.
* 01-15-08 01.05.05 Added define for MPI_RAID_ACTION_SET_VOLUME_NAME.
* --------------------------------------------------------------------------
*/
#ifndef MPI_RAID_H
#define MPI_RAID_H
/******************************************************************************
*
* R A I D M e s s a g e s
*
*******************************************************************************/
/****************************************************************************/
/* RAID Action Request */
/****************************************************************************/
typedef struct _MSG_RAID_ACTION
{
U8 Action; /* 00h */
U8 Reserved1; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 VolumeID; /* 04h */
U8 VolumeBus; /* 05h */
U8 PhysDiskNum; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved2; /* 0Ch */
U32 ActionDataWord; /* 10h */
SGE_SIMPLE_UNION ActionDataSGE; /* 14h */
} MSG_RAID_ACTION_REQUEST, MPI_POINTER PTR_MSG_RAID_ACTION_REQUEST,
MpiRaidActionRequest_t , MPI_POINTER pMpiRaidActionRequest_t;
/* RAID Action request Action values */
#define MPI_RAID_ACTION_STATUS (0x00)
#define MPI_RAID_ACTION_INDICATOR_STRUCT (0x01)
#define MPI_RAID_ACTION_CREATE_VOLUME (0x02)
#define MPI_RAID_ACTION_DELETE_VOLUME (0x03)
#define MPI_RAID_ACTION_DISABLE_VOLUME (0x04)
#define MPI_RAID_ACTION_ENABLE_VOLUME (0x05)
#define MPI_RAID_ACTION_QUIESCE_PHYS_IO (0x06)
#define MPI_RAID_ACTION_ENABLE_PHYS_IO (0x07)
#define MPI_RAID_ACTION_CHANGE_VOLUME_SETTINGS (0x08)
#define MPI_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
#define MPI_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
#define MPI_RAID_ACTION_CHANGE_PHYSDISK_SETTINGS (0x0C)
#define MPI_RAID_ACTION_CREATE_PHYSDISK (0x0D)
#define MPI_RAID_ACTION_DELETE_PHYSDISK (0x0E)
#define MPI_RAID_ACTION_FAIL_PHYSDISK (0x0F)
#define MPI_RAID_ACTION_REPLACE_PHYSDISK (0x10)
#define MPI_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI_RAID_ACTION_INACTIVATE_VOLUME (0x12)
#define MPI_RAID_ACTION_SET_RESYNC_RATE (0x13)
#define MPI_RAID_ACTION_SET_DATA_SCRUB_RATE (0x14)
#define MPI_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
#define MPI_RAID_ACTION_SET_VOLUME_NAME (0x16)
/* ActionDataWord defines for use with MPI_RAID_ACTION_CREATE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_DO_NOT_SYNC (0x00000001)
#define MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT (0x00000002)
/* ActionDataWord defines for use with MPI_RAID_ACTION_DELETE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_KEEP_PHYS_DISKS (0x00000000)
#define MPI_RAID_ACTION_ADATA_DEL_PHYS_DISKS (0x00000001)
#define MPI_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
#define MPI_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000002)
/* ActionDataWord defines for use with MPI_RAID_ACTION_DISABLE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_DISABLE_FULL_REBUILD (0x00000001)
/* ActionDataWord defines for use with MPI_RAID_ACTION_ACTIVATE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_INACTIVATE_ALL (0x00000001)
/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_RESYNC_RATE action */
#define MPI_RAID_ACTION_ADATA_RESYNC_RATE_MASK (0x000000FF)
/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_DATA_SCRUB_RATE action */
#define MPI_RAID_ACTION_ADATA_DATA_SCRUB_RATE_MASK (0x000000FF)
/* ActionDataWord defines for use with MPI_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
#define MPI_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x00000001)
#define MPI_RAID_ACTION_ADATA_MASK_FW_UPDATE_TIMEOUT (0x0000FF00)
#define MPI_RAID_ACTION_ADATA_SHIFT_FW_UPDATE_TIMEOUT (8)
/* RAID Action reply message */
typedef struct _MSG_RAID_ACTION_REPLY
{
U8 Action; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 VolumeID; /* 04h */
U8 VolumeBus; /* 05h */
U8 PhysDiskNum; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 ActionStatus; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 VolumeStatus; /* 14h */
U32 ActionData; /* 18h */
} MSG_RAID_ACTION_REPLY, MPI_POINTER PTR_MSG_RAID_ACTION_REPLY,
MpiRaidActionReply_t, MPI_POINTER pMpiRaidActionReply_t;
/* RAID Volume reply ActionStatus values */
#define MPI_RAID_ACTION_ASTATUS_SUCCESS (0x0000)
#define MPI_RAID_ACTION_ASTATUS_INVALID_ACTION (0x0001)
#define MPI_RAID_ACTION_ASTATUS_FAILURE (0x0002)
#define MPI_RAID_ACTION_ASTATUS_IN_PROGRESS (0x0003)
/* RAID Volume reply RAID Volume Indicator structure */
typedef struct _MPI_RAID_VOL_INDICATOR
{
U64 TotalBlocks; /* 00h */
U64 BlocksRemaining; /* 08h */
} MPI_RAID_VOL_INDICATOR, MPI_POINTER PTR_MPI_RAID_VOL_INDICATOR,
MpiRaidVolIndicator_t, MPI_POINTER pMpiRaidVolIndicator_t;
/****************************************************************************/
/* SCSI IO RAID Passthrough Request */
/****************************************************************************/
typedef struct _MSG_SCSI_IO_RAID_PT_REQUEST
{
U8 PhysDiskNum; /* 00h */
U8 Reserved1; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Control; /* 14h */
U8 CDB[16]; /* 18h */
U32 DataLength; /* 28h */
U32 SenseBufferLowAddr; /* 2Ch */
SGE_IO_UNION SGL; /* 30h */
} MSG_SCSI_IO_RAID_PT_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REQUEST,
SCSIIORaidPassthroughRequest_t, MPI_POINTER pSCSIIORaidPassthroughRequest_t;
/* SCSI IO RAID Passthrough reply structure */
typedef struct _MSG_SCSI_IO_RAID_PT_REPLY
{
U8 PhysDiskNum; /* 00h */
U8 Reserved1; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 SCSIStatus; /* 0Ch */
U8 SCSIState; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
} MSG_SCSI_IO_RAID_PT_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REPLY,
SCSIIORaidPassthroughReply_t, MPI_POINTER pSCSIIORaidPassthroughReply_t;
/****************************************************************************/
/* Mailbox reqeust structure */
/****************************************************************************/
typedef struct _MSG_MAILBOX_REQUEST
{
U16 Reserved1;
U8 ChainOffset;
U8 Function;
U16 Reserved2;
U8 Reserved3;
U8 MsgFlags;
U32 MsgContext;
U8 Command[10];
U16 Reserved4;
SGE_IO_UNION SGL;
} MSG_MAILBOX_REQUEST, MPI_POINTER PTR_MSG_MAILBOX_REQUEST,
MailboxRequest_t, MPI_POINTER pMailboxRequest_t;
/* Mailbox reply structure */
typedef struct _MSG_MAILBOX_REPLY
{
U16 Reserved1; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 MailboxStatus; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 Reserved4; /* 14h */
} MSG_MAILBOX_REPLY, MPI_POINTER PTR_MSG_MAILBOX_REPLY,
MailboxReply_t, MPI_POINTER pMailboxReply_t;
#endif

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source/lsi/mpi_sas.h Executable file
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/*
* Copyright (c) 2004-2008 LSI Corporation.
*
*
* Name: mpi_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: August 19, 2004
*
* mpi_sas.h Version: 01.05.05
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 08-19-04 01.05.01 Original release.
* 08-30-05 01.05.02 Added DeviceInfo bit for SEP.
* Added PrimFlags and Primitive field to SAS IO Unit
* Control request, and added a new operation code.
* 03-27-06 01.05.03 Added Force Full Discovery, Transmit Port Select Signal,
* and Remove Device operations to SAS IO Unit Control.
* Added DevHandle field to SAS IO Unit Control request and
* reply.
* 10-11-06 01.05.04 Fixed the name of a define for Operation field of SAS IO
* Unit Control request.
* 01-15-08 01.05.05 Added support for MPI_SAS_OP_SET_IOC_PARAMETER,
* including adding IOCParameter and IOCParameter value
* fields to SAS IO Unit Control Request.
* Added MPI_SAS_DEVICE_INFO_PRODUCT_SPECIFIC define.
* --------------------------------------------------------------------------
*/
#ifndef MPI_SAS_H
#define MPI_SAS_H
/*
* Values for SASStatus.
*/
#define MPI_SASSTATUS_SUCCESS (0x00)
#define MPI_SASSTATUS_UNKNOWN_ERROR (0x01)
#define MPI_SASSTATUS_INVALID_FRAME (0x02)
#define MPI_SASSTATUS_UTC_BAD_DEST (0x03)
#define MPI_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
#define MPI_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
#define MPI_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
#define MPI_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
#define MPI_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
#define MPI_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
#define MPI_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
#define MPI_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
#define MPI_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
#define MPI_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
#define MPI_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
#define MPI_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
#define MPI_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
#define MPI_SASSTATUS_DATA_OFFSET_ERROR (0x11)
#define MPI_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
#define MPI_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
#define MPI_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
/*
* Values for the SAS DeviceInfo field used in SAS Device Status Change Event
* data and SAS IO Unit Configuration pages.
*/
#define MPI_SAS_DEVICE_INFO_PRODUCT_SPECIFIC (0xF0000000)
#define MPI_SAS_DEVICE_INFO_SEP (0x00004000)
#define MPI_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
#define MPI_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/*****************************************************************************
*
* S e r i a l A t t a c h e d S C S I M e s s a g e s
*
*****************************************************************************/
/****************************************************************************/
/* Serial Management Protocol Passthrough Request */
/****************************************************************************/
typedef struct _MSG_SMP_PASSTHROUGH_REQUEST
{
U8 PassthroughFlags; /* 00h */
U8 PhysicalPort; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 RequestDataLength; /* 04h */
U8 ConnectionRate; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved1; /* 0Ch */
U64 SASAddress; /* 10h */
U32 Reserved2; /* 18h */
U32 Reserved3; /* 1Ch */
SGE_SIMPLE_UNION SGL; /* 20h */
} MSG_SMP_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REQUEST,
SmpPassthroughRequest_t, MPI_POINTER pSmpPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
/* values for ConnectionRate field */
#define MPI_SMP_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
#define MPI_SMP_PT_REQ_CONNECT_RATE_1_5 (0x08)
#define MPI_SMP_PT_REQ_CONNECT_RATE_3_0 (0x09)
/* Serial Management Protocol Passthrough Reply */
typedef struct _MSG_SMP_PASSTHROUGH_REPLY
{
U8 PassthroughFlags; /* 00h */
U8 PhysicalPort; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 ResponseDataLength; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2; /* 0Ch */
U8 SASStatus; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 Reserved3; /* 14h */
U8 ResponseData[4]; /* 18h */
} MSG_SMP_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REPLY,
SmpPassthroughReply_t, MPI_POINTER pSmpPassthroughReply_t;
#define MPI_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
/****************************************************************************/
/* SATA Passthrough Request */
/****************************************************************************/
typedef struct _MSG_SATA_PASSTHROUGH_REQUEST
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 PassthroughFlags; /* 04h */
U8 ConnectionRate; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved1; /* 0Ch */
U32 Reserved2; /* 10h */
U32 Reserved3; /* 14h */
U32 DataLength; /* 18h */
U8 CommandFIS[20]; /* 1Ch */
SGE_SIMPLE_UNION SGL; /* 30h */
} MSG_SATA_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REQUEST,
SataPassthroughRequest_t, MPI_POINTER pSataPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI_SATA_PT_REQ_PT_FLAGS_RESET_DEVICE (0x0200)
#define MPI_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI_SATA_PT_REQ_PT_FLAGS_DMA_QUEUED (0x0080)
#define MPI_SATA_PT_REQ_PT_FLAGS_PACKET_COMMAND (0x0040)
#define MPI_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
#define MPI_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
#define MPI_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
/* values for ConnectionRate field */
#define MPI_SATA_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
#define MPI_SATA_PT_REQ_CONNECT_RATE_1_5 (0x08)
#define MPI_SATA_PT_REQ_CONNECT_RATE_3_0 (0x09)
/* SATA Passthrough Reply */
typedef struct _MSG_SATA_PASSTHROUGH_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 PassthroughFlags; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2; /* 0Ch */
U8 SASStatus; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U8 StatusFIS[20]; /* 14h */
U32 StatusControlRegisters; /* 28h */
U32 TransferCount; /* 2Ch */
} MSG_SATA_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REPLY,
SataPassthroughReply_t, MPI_POINTER pSataPassthroughReply_t;
/****************************************************************************/
/* SAS IO Unit Control Request */
/****************************************************************************/
typedef struct _MSG_SAS_IOUNIT_CONTROL_REQUEST
{
U8 Operation; /* 00h */
U8 Reserved1; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 DevHandle; /* 04h */
U8 IOCParameter; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 TargetID; /* 0Ch */
U8 Bus; /* 0Dh */
U8 PhyNum; /* 0Eh */
U8 PrimFlags; /* 0Fh */
U32 Primitive; /* 10h */
U64 SASAddress; /* 14h */
U32 IOCParameterValue; /* 1Ch */
} MSG_SAS_IOUNIT_CONTROL_REQUEST, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REQUEST,
SasIoUnitControlRequest_t, MPI_POINTER pSasIoUnitControlRequest_t;
/* values for the Operation field */
#define MPI_SAS_OP_CLEAR_NOT_PRESENT (0x01)
#define MPI_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI_SAS_OP_MAP_CURRENT (0x09)
#define MPI_SAS_OP_SEND_PRIMITIVE (0x0A)
#define MPI_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C)
#define MPI_SAS_OP_TRANSMIT_REMOVE_DEVICE (0x0D) /* obsolete name */
#define MPI_SAS_OP_REMOVE_DEVICE (0x0D)
#define MPI_SAS_OP_SET_IOC_PARAMETER (0x0E)
#define MPI_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
/* values for the PrimFlags field */
#define MPI_SAS_PRIMFLAGS_SINGLE (0x08)
#define MPI_SAS_PRIMFLAGS_TRIPLE (0x02)
#define MPI_SAS_PRIMFLAGS_REDUNDANT (0x01)
/* SAS IO Unit Control Reply */
typedef struct _MSG_SAS_IOUNIT_CONTROL_REPLY
{
U8 Operation; /* 00h */
U8 Reserved1; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 DevHandle; /* 04h */
U8 IOCParameter; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved4; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_SAS_IOUNIT_CONTROL_REPLY, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REPLY,
SasIoUnitControlReply_t, MPI_POINTER pSasIoUnitControlReply_t;
#endif

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/*
* Copyright (c) 2001-2008 LSI Corporation.
*
*
* Name: mpi_tool.h
* Title: MPI Toolbox structures and definitions
* Creation Date: July 30, 2001
*
* mpi_tool.h Version: 01.05.03
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 08-08-01 01.02.01 Original release.
* 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
* 01-16-04 01.02.03 Added defines and structures for new tools
*. MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL and
* MPI_TOOLBOX_FC_MANAGEMENT_TOOL.
* 04-29-04 01.02.04 Added message structures for Diagnostic Buffer Post and
* Diagnostic Release requests and replies.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 10-06-04 01.05.02 Added define for MPI_DIAG_BUF_TYPE_COUNT.
* 02-09-05 01.05.03 Added frame size option to FC management tool.
* Added Beacon tool to the Toolbox.
* --------------------------------------------------------------------------
*/
#ifndef MPI_TOOL_H
#define MPI_TOOL_H
#define MPI_TOOLBOX_CLEAN_TOOL (0x00)
#define MPI_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
#define MPI_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
#define MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI_TOOLBOX_FC_MANAGEMENT_TOOL (0x04)
#define MPI_TOOLBOX_BEACON_TOOL (0x05)
/****************************************************************************/
/* Toolbox reply */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_REPLY
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_TOOLBOX_REPLY, MPI_POINTER PTR_MSG_TOOLBOX_REPLY,
ToolboxReply_t, MPI_POINTER pToolboxReply_t;
/****************************************************************************/
/* Toolbox Clean Tool request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_CLEAN_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Flags; /* 0Ch */
} MSG_TOOLBOX_CLEAN_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_CLEAN_REQUEST,
ToolboxCleanRequest_t, MPI_POINTER pToolboxCleanRequest_t;
#define MPI_TOOLBOX_CLEAN_NVSRAM (0x00000001)
#define MPI_TOOLBOX_CLEAN_SEEPROM (0x00000002)
#define MPI_TOOLBOX_CLEAN_FLASH (0x00000004)
#define MPI_TOOLBOX_CLEAN_BOOTLOADER (0x04000000)
#define MPI_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
#define MPI_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
#define MPI_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
/****************************************************************************/
/* Toolbox Memory Move request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_MEM_MOVE_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
SGE_SIMPLE_UNION SGL; /* 0Ch */
} MSG_TOOLBOX_MEM_MOVE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_MEM_MOVE_REQUEST,
ToolboxMemMoveRequest_t, MPI_POINTER pToolboxMemMoveRequest_t;
/****************************************************************************/
/* Toolbox Diagnostic Data Upload request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Flags; /* 0Ch */
U32 Reserved3; /* 10h */
SGE_SIMPLE_UNION SGL; /* 14h */
} MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
ToolboxDiagDataUploadRequest_t, MPI_POINTER pToolboxDiagDataUploadRequest_t;
typedef struct _DIAG_DATA_UPLOAD_HEADER
{
U32 DiagDataLength; /* 00h */
U8 FormatCode; /* 04h */
U8 Reserved; /* 05h */
U16 Reserved1; /* 06h */
} DIAG_DATA_UPLOAD_HEADER, MPI_POINTER PTR_DIAG_DATA_UPLOAD_HEADER,
DiagDataUploadHeader_t, MPI_POINTER pDiagDataUploadHeader_t;
#define MPI_TB_DIAG_FORMAT_SCSI_PRINTF_1 (0x01)
#define MPI_TB_DIAG_FORMAT_SCSI_2 (0x02)
#define MPI_TB_DIAG_FORMAT_SCSI_3 (0x03)
#define MPI_TB_DIAG_FORMAT_FC_TRACE_1 (0x04)
/****************************************************************************/
/* Toolbox ISTWI Read Write request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Flags; /* 0Ch */
U8 BusNum; /* 0Dh */
U16 Reserved3; /* 0Eh */
U8 NumAddressBytes; /* 10h */
U8 Reserved4; /* 11h */
U16 DataLength; /* 12h */
U8 DeviceAddr; /* 14h */
U8 Addr1; /* 15h */
U8 Addr2; /* 16h */
U8 Addr3; /* 17h */
U32 Reserved5; /* 18h */
SGE_SIMPLE_UNION SGL; /* 1Ch */
} MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
ToolboxIstwiReadWriteRequest_t, MPI_POINTER pToolboxIstwiReadWriteRequest_t;
#define MPI_TB_ISTWI_FLAGS_WRITE (0x00)
#define MPI_TB_ISTWI_FLAGS_READ (0x01)
/****************************************************************************/
/* Toolbox FC Management request */
/****************************************************************************/
/* ActionInfo for Bus and TargetId */
typedef struct _MPI_TB_FC_MANAGE_BUS_TID_AI
{
U16 Reserved; /* 00h */
U8 Bus; /* 02h */
U8 TargetId; /* 03h */
} MPI_TB_FC_MANAGE_BUS_TID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_BUS_TID_AI,
MpiTbFcManageBusTidAi_t, MPI_POINTER pMpiTbFcManageBusTidAi_t;
/* ActionInfo for port identifier */
typedef struct _MPI_TB_FC_MANAGE_PID_AI
{
U32 PortIdentifier; /* 00h */
} MPI_TB_FC_MANAGE_PID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_PID_AI,
MpiTbFcManagePidAi_t, MPI_POINTER pMpiTbFcManagePidAi_t;
/* ActionInfo for set max frame size */
typedef struct _MPI_TB_FC_MANAGE_FRAME_SIZE_AI
{
U16 FrameSize; /* 00h */
U8 PortNum; /* 02h */
U8 Reserved1; /* 03h */
} MPI_TB_FC_MANAGE_FRAME_SIZE_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_FRAME_SIZE_AI,
MpiTbFcManageFrameSizeAi_t, MPI_POINTER pMpiTbFcManageFrameSizeAi_t;
/* ActionInfo for set login parameters */
typedef struct _MPI_TB_FC_MANAGE_LOGIN_PARAMS_AI
{
U8 Count; /* 00h */
U8 Period; /* 01h */
U8 PortNum; /* 02h */
U8 Reserved1; /* 03h */
U8 FlogiBurst; /* 04h */
U8 FlogiExchanges; /* 05h */
U8 PlogiBurst; /* 06h */
U8 PlogiExchanges; /* 07h */
} MPI_TB_FC_MANAGE_LOGIN_PARAMS_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_LOGIN_PARAMS_AI,
MpiTbFcManageLoginParamsAi_t, MPI_POINTER pMpiTbFcManageLoginParamsAi_t;
/* ActionInfo for create virtual port */
typedef struct _MPI_TB_FC_MANAGE_CREATE_VP_AI
{
U32 PortIdentifier; /* 00h */
U64 WWNN; /* 04h */
U64 WWPN; /* 0Ch */
} MPI_TB_FC_MANAGE_CREATE_VP_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_CREATE_VP_AI,
MpiTbFcManageCreateVpAi_t, MPI_POINTER pMpiTbFcManageCreateVp_t;
/* union of ActionInfo */
typedef union _MPI_TB_FC_MANAGE_AI_UNION
{
MPI_TB_FC_MANAGE_BUS_TID_AI BusTid;
MPI_TB_FC_MANAGE_PID_AI Port;
MPI_TB_FC_MANAGE_FRAME_SIZE_AI FrameSize;
MPI_TB_FC_MANAGE_LOGIN_PARAMS_AI LoginParams;
MPI_TB_FC_MANAGE_CREATE_VP_AI CreateVp;
} MPI_TB_FC_MANAGE_AI_UNION, MPI_POINTER PTR_MPI_TB_FC_MANAGE_AI_UNION,
MpiTbFcManageAiUnion_t, MPI_POINTER pMpiTbFcManageAiUnion_t;
typedef struct _MSG_TOOLBOX_FC_MANAGE_REQUEST
{
U8 Tool; /* 00h */
U8 AliasIndex; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Action; /* 0Ch */
U8 Flags; /* 0Dh */
U16 Reserved4; /* 0Eh */
MPI_TB_FC_MANAGE_AI_UNION ActionInfo; /* 10h */
} MSG_TOOLBOX_FC_MANAGE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_FC_MANAGE_REQUEST,
ToolboxFcManageRequest_t, MPI_POINTER pToolboxFcManageRequest_t;
/* defines for the Action field */
#define MPI_TB_FC_MANAGE_ACTION_DISC_ALL (0x00)
#define MPI_TB_FC_MANAGE_ACTION_DISC_PID (0x01)
#define MPI_TB_FC_MANAGE_ACTION_DISC_BUS_TID (0x02)
#define MPI_TB_FC_MANAGE_ACTION_SET_MAX_FRAME_SIZE (0x03)
#define MPI_TB_FC_MANAGE_ACTION_LOGOUT_PID (0x04)
#define MPI_TB_FC_MANAGE_ACTION_LOGOUT_BUS_TID (0x05)
#define MPI_TB_FC_MANAGE_ACTION_SET_LOGIN_PARAMS (0x06)
#define MPI_TB_FC_MANAGE_ACTION_GET_LOGIN_PARAMS (0x07)
#define MPI_TB_FC_MANAGE_ACTION_CREATE_VP (0x08)
#define MPI_TB_FC_MANAGE_ACTION_DELETE_VP (0x09)
/* defines for the Flags field */
#define MPI_TB_FC_MANAGE_FLAGS_KEEP_LOGGED_OUT (0x01)
#define MPI_TB_FC_MANAGE_FLAGS_AUTO_RETRY (0x02)
typedef struct _MSG_TOOLBOX_FC_MANAGE_REPLY
{
U8 Tool; /* 00h */
U8 AliasIndex; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 Reserved4[3]; /* 14h */
MPI_TB_FC_MANAGE_AI_UNION ActionInfo; /* 20h */
} MSG_TOOLBOX_FC_MANAGE_REPLY, MPI_POINTER PTR_MSG_TOOLBOX_FC_MANAGE_REPLY,
ToolboxFcManageReply_t, MPI_POINTER pToolboxFcManageReply_t;
/****************************************************************************/
/* Toolbox Beacon Tool request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_BEACON_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 ConnectNum; /* 0Ch */
U8 PortNum; /* 0Dh */
U8 Reserved3; /* 0Eh */
U8 Flags; /* 0Fh */
} MSG_TOOLBOX_BEACON_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_BEACON_REQUEST,
ToolboxBeaconRequest_t, MPI_POINTER pToolboxBeaconRequest_t;
#define MPI_TOOLBOX_FLAGS_BEACON_MODE_OFF (0x00)
#define MPI_TOOLBOX_FLAGS_BEACON_MODE_ON (0x01)
/****************************************************************************/
/* Diagnostic Buffer Post request */
/****************************************************************************/
typedef struct _MSG_DIAG_BUFFER_POST_REQUEST
{
U8 TraceLevel; /* 00h */
U8 BufferType; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 ExtendedType; /* 0Ch */
U32 BufferLength; /* 10h */
U32 ProductSpecific[4]; /* 14h */
U32 Reserved3; /* 24h */
U64 BufferAddress; /* 28h */
} MSG_DIAG_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REQUEST,
DiagBufferPostRequest_t, MPI_POINTER pDiagBufferPostRequest_t;
#define MPI_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI_DIAG_BUF_TYPE_EXTENDED (0x02)
/* count of the number of buffer types */
#define MPI_DIAG_BUF_TYPE_COUNT (0x03)
#define MPI_DIAG_EXTENDED_QTAG (0x00000001)
/* Diagnostic Buffer Post reply */
typedef struct _MSG_DIAG_BUFFER_POST_REPLY
{
U8 Reserved1; /* 00h */
U8 BufferType; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved4; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferLength; /* 14h */
} MSG_DIAG_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REPLY,
DiagBufferPostReply_t, MPI_POINTER pDiagBufferPostReply_t;
/****************************************************************************/
/* Diagnostic Release request */
/****************************************************************************/
typedef struct _MSG_DIAG_RELEASE_REQUEST
{
U8 Reserved1; /* 00h */
U8 BufferType; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
} MSG_DIAG_RELEASE_REQUEST, MPI_POINTER PTR_MSG_DIAG_RELEASE_REQUEST,
DiagReleaseRequest_t, MPI_POINTER pDiagReleaseRequest_t;
/* Diagnostic Release reply */
typedef struct _MSG_DIAG_RELEASE_REPLY
{
U8 Reserved1; /* 00h */
U8 BufferType; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved4; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_DIAG_RELEASE_REPLY, MPI_POINTER PTR_MSG_DIAG_RELEASE_REPLY,
DiagReleaseReply_t, MPI_POINTER pDiagReleaseReply_t;
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_type.h
* Title: MPI Basic type definitions
* Creation Date: June 6, 2000
*
* mpi_type.h Version: 01.05.02
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 08-30-05 01.05.02 Added PowerPC option to #ifdef's.
* --------------------------------------------------------------------------
*/
#ifndef MPI_TYPE_H
#define MPI_TYPE_H
/*******************************************************************************
* Define MPI_POINTER if it hasn't already been defined. By default MPI_POINTER
* is defined to be a near pointer. MPI_POINTER can be defined as a far pointer
* by defining MPI_POINTER as "far *" before this header file is included.
*/
#ifndef MPI_POINTER
#define MPI_POINTER *
#endif
/*****************************************************************************
*
* B a s i c T y p e s
*
*****************************************************************************/
typedef signed char S8;
typedef unsigned char U8;
typedef signed short S16;
typedef unsigned short U16;
#if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__PPC__) || defined(__ppc)
typedef signed int S32;
typedef unsigned int U32;
#else
typedef signed long S32;
typedef unsigned long U32;
#endif
typedef struct _S64
{
U32 Low;
S32 High;
} S64;
typedef struct _U64
{
U32 Low;
U32 High;
} U64;
/****************************************************************************/
/* Pointers */
/****************************************************************************/
typedef S8 *PS8;
typedef U8 *PU8;
typedef S16 *PS16;
typedef U16 *PU16;
typedef S32 *PS32;
typedef U32 *PU32;
typedef S64 *PS64;
typedef U64 *PU64;
#endif

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