290 lines
7.2 KiB
Perl
290 lines
7.2 KiB
Perl
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#!/usr/bin/env perl
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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#
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# May 2011
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#
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# The module implements bn_GF2m_mul_2x2 polynomial multiplication
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# used in bn_gf2m.c. It's kind of low-hanging mechanical port from
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# C for the time being... Except that it has two code paths: pure
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# integer code suitable for any ARMv4 and later CPU and NEON code
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# suitable for ARMv7. Pure integer 1x1 multiplication subroutine runs
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# in ~45 cycles on dual-issue core such as Cortex A8, which is ~50%
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# faster than compiler-generated code. For ECDH and ECDSA verify (but
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# not for ECDSA sign) it means 25%-45% improvement depending on key
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# length, more for longer keys. Even though NEON 1x1 multiplication
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# runs in even less cycles, ~30, improvement is measurable only on
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# longer keys. One has to optimize code elsewhere to get NEON glow...
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#
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# April 2014
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#
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# Double bn_GF2m_mul_2x2 performance by using algorithm from paper
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# referred below, which improves ECDH and ECDSA verify benchmarks
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# by 18-40%.
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#
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# Câmara, D.; Gouvêa, C. P. L.; López, J. & Dahab, R.: Fast Software
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# Polynomial Multiplication on ARM Processors using the NEON Engine.
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#
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# http://conradoplg.cryptoland.net/files/2010/12/mocrysen13.pdf
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while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {}
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open STDOUT,">$output";
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$code=<<___;
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#include "arm_arch.h"
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.text
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.code 32
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___
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################
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# private interface to mul_1x1_ialu
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#
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$a="r1";
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$b="r0";
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($a0,$a1,$a2,$a12,$a4,$a14)=
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($hi,$lo,$t0,$t1, $i0,$i1 )=map("r$_",(4..9),12);
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$mask="r12";
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$code.=<<___;
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.type mul_1x1_ialu,%function
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.align 5
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mul_1x1_ialu:
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mov $a0,#0
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bic $a1,$a,#3<<30 @ a1=a&0x3fffffff
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str $a0,[sp,#0] @ tab[0]=0
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add $a2,$a1,$a1 @ a2=a1<<1
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str $a1,[sp,#4] @ tab[1]=a1
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eor $a12,$a1,$a2 @ a1^a2
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str $a2,[sp,#8] @ tab[2]=a2
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mov $a4,$a1,lsl#2 @ a4=a1<<2
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str $a12,[sp,#12] @ tab[3]=a1^a2
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eor $a14,$a1,$a4 @ a1^a4
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str $a4,[sp,#16] @ tab[4]=a4
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eor $a0,$a2,$a4 @ a2^a4
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str $a14,[sp,#20] @ tab[5]=a1^a4
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eor $a12,$a12,$a4 @ a1^a2^a4
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str $a0,[sp,#24] @ tab[6]=a2^a4
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and $i0,$mask,$b,lsl#2
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str $a12,[sp,#28] @ tab[7]=a1^a2^a4
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and $i1,$mask,$b,lsr#1
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ldr $lo,[sp,$i0] @ tab[b & 0x7]
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and $i0,$mask,$b,lsr#4
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ldr $t1,[sp,$i1] @ tab[b >> 3 & 0x7]
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and $i1,$mask,$b,lsr#7
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ldr $t0,[sp,$i0] @ tab[b >> 6 & 0x7]
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eor $lo,$lo,$t1,lsl#3 @ stall
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mov $hi,$t1,lsr#29
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ldr $t1,[sp,$i1] @ tab[b >> 9 & 0x7]
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and $i0,$mask,$b,lsr#10
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eor $lo,$lo,$t0,lsl#6
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eor $hi,$hi,$t0,lsr#26
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ldr $t0,[sp,$i0] @ tab[b >> 12 & 0x7]
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and $i1,$mask,$b,lsr#13
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eor $lo,$lo,$t1,lsl#9
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eor $hi,$hi,$t1,lsr#23
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ldr $t1,[sp,$i1] @ tab[b >> 15 & 0x7]
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and $i0,$mask,$b,lsr#16
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eor $lo,$lo,$t0,lsl#12
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eor $hi,$hi,$t0,lsr#20
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ldr $t0,[sp,$i0] @ tab[b >> 18 & 0x7]
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and $i1,$mask,$b,lsr#19
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eor $lo,$lo,$t1,lsl#15
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eor $hi,$hi,$t1,lsr#17
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ldr $t1,[sp,$i1] @ tab[b >> 21 & 0x7]
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and $i0,$mask,$b,lsr#22
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eor $lo,$lo,$t0,lsl#18
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eor $hi,$hi,$t0,lsr#14
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ldr $t0,[sp,$i0] @ tab[b >> 24 & 0x7]
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and $i1,$mask,$b,lsr#25
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eor $lo,$lo,$t1,lsl#21
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eor $hi,$hi,$t1,lsr#11
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ldr $t1,[sp,$i1] @ tab[b >> 27 & 0x7]
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tst $a,#1<<30
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and $i0,$mask,$b,lsr#28
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eor $lo,$lo,$t0,lsl#24
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eor $hi,$hi,$t0,lsr#8
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ldr $t0,[sp,$i0] @ tab[b >> 30 ]
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eorne $lo,$lo,$b,lsl#30
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eorne $hi,$hi,$b,lsr#2
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tst $a,#1<<31
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eor $lo,$lo,$t1,lsl#27
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eor $hi,$hi,$t1,lsr#5
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eorne $lo,$lo,$b,lsl#31
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eorne $hi,$hi,$b,lsr#1
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eor $lo,$lo,$t0,lsl#30
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eor $hi,$hi,$t0,lsr#2
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mov pc,lr
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.size mul_1x1_ialu,.-mul_1x1_ialu
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___
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################
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# void bn_GF2m_mul_2x2(BN_ULONG *r,
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# BN_ULONG a1,BN_ULONG a0,
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# BN_ULONG b1,BN_ULONG b0); # r[3..0]=a1a0·b1b0
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{
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$code.=<<___;
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.global bn_GF2m_mul_2x2
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.type bn_GF2m_mul_2x2,%function
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.align 5
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bn_GF2m_mul_2x2:
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#if __ARM_MAX_ARCH__>=7
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ldr r12,.LOPENSSL_armcap
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.Lpic: ldr r12,[pc,r12]
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tst r12,#1
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bne .LNEON
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#endif
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___
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$ret="r10"; # reassigned 1st argument
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$code.=<<___;
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stmdb sp!,{r4-r10,lr}
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mov $ret,r0 @ reassign 1st argument
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mov $b,r3 @ $b=b1
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ldr r3,[sp,#32] @ load b0
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mov $mask,#7<<2
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sub sp,sp,#32 @ allocate tab[8]
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bl mul_1x1_ialu @ a1·b1
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str $lo,[$ret,#8]
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str $hi,[$ret,#12]
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eor $b,$b,r3 @ flip b0 and b1
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eor $a,$a,r2 @ flip a0 and a1
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eor r3,r3,$b
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eor r2,r2,$a
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eor $b,$b,r3
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eor $a,$a,r2
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bl mul_1x1_ialu @ a0·b0
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str $lo,[$ret]
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str $hi,[$ret,#4]
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eor $a,$a,r2
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eor $b,$b,r3
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bl mul_1x1_ialu @ (a1+a0)·(b1+b0)
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___
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@r=map("r$_",(6..9));
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$code.=<<___;
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ldmia $ret,{@r[0]-@r[3]}
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eor $lo,$lo,$hi
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eor $hi,$hi,@r[1]
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eor $lo,$lo,@r[0]
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eor $hi,$hi,@r[2]
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eor $lo,$lo,@r[3]
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eor $hi,$hi,@r[3]
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str $hi,[$ret,#8]
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eor $lo,$lo,$hi
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add sp,sp,#32 @ destroy tab[8]
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str $lo,[$ret,#4]
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#if __ARM_ARCH__>=5
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ldmia sp!,{r4-r10,pc}
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#else
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ldmia sp!,{r4-r10,lr}
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tst lr,#1
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moveq pc,lr @ be binary compatible with V4, yet
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bx lr @ interoperable with Thumb ISA:-)
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#endif
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___
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}
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{
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my ($r,$t0,$t1,$t2,$t3)=map("q$_",(0..3,8..12));
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my ($a,$b,$k48,$k32,$k16)=map("d$_",(26..31));
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$code.=<<___;
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#if __ARM_MAX_ARCH__>=7
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.arch armv7-a
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.fpu neon
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.align 5
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.LNEON:
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ldr r12, [sp] @ 5th argument
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vmov.32 $a, r2, r1
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vmov.32 $b, r12, r3
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vmov.i64 $k48, #0x0000ffffffffffff
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vmov.i64 $k32, #0x00000000ffffffff
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vmov.i64 $k16, #0x000000000000ffff
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vext.8 $t0#lo, $a, $a, #1 @ A1
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vmull.p8 $t0, $t0#lo, $b @ F = A1*B
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vext.8 $r#lo, $b, $b, #1 @ B1
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vmull.p8 $r, $a, $r#lo @ E = A*B1
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vext.8 $t1#lo, $a, $a, #2 @ A2
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vmull.p8 $t1, $t1#lo, $b @ H = A2*B
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vext.8 $t3#lo, $b, $b, #2 @ B2
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vmull.p8 $t3, $a, $t3#lo @ G = A*B2
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vext.8 $t2#lo, $a, $a, #3 @ A3
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veor $t0, $t0, $r @ L = E + F
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vmull.p8 $t2, $t2#lo, $b @ J = A3*B
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vext.8 $r#lo, $b, $b, #3 @ B3
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veor $t1, $t1, $t3 @ M = G + H
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vmull.p8 $r, $a, $r#lo @ I = A*B3
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veor $t0#lo, $t0#lo, $t0#hi @ t0 = (L) (P0 + P1) << 8
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vand $t0#hi, $t0#hi, $k48
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vext.8 $t3#lo, $b, $b, #4 @ B4
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veor $t1#lo, $t1#lo, $t1#hi @ t1 = (M) (P2 + P3) << 16
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vand $t1#hi, $t1#hi, $k32
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vmull.p8 $t3, $a, $t3#lo @ K = A*B4
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veor $t2, $t2, $r @ N = I + J
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veor $t0#lo, $t0#lo, $t0#hi
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veor $t1#lo, $t1#lo, $t1#hi
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veor $t2#lo, $t2#lo, $t2#hi @ t2 = (N) (P4 + P5) << 24
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vand $t2#hi, $t2#hi, $k16
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vext.8 $t0, $t0, $t0, #15
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veor $t3#lo, $t3#lo, $t3#hi @ t3 = (K) (P6 + P7) << 32
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vmov.i64 $t3#hi, #0
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vext.8 $t1, $t1, $t1, #14
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veor $t2#lo, $t2#lo, $t2#hi
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vmull.p8 $r, $a, $b @ D = A*B
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vext.8 $t3, $t3, $t3, #12
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vext.8 $t2, $t2, $t2, #13
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veor $t0, $t0, $t1
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veor $t2, $t2, $t3
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veor $r, $r, $t0
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veor $r, $r, $t2
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vst1.32 {$r}, [r0]
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ret @ bx lr
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#endif
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___
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}
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$code.=<<___;
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.size bn_GF2m_mul_2x2,.-bn_GF2m_mul_2x2
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#if __ARM_MAX_ARCH__>=7
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.align 5
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.LOPENSSL_armcap:
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.word OPENSSL_armcap_P-(.Lpic+8)
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#endif
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.asciz "GF(2^m) Multiplication for ARMv4/NEON, CRYPTOGAMS by <appro\@openssl.org>"
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.align 5
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#if __ARM_MAX_ARCH__>=7
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.comm OPENSSL_armcap_P,4,4
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#endif
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___
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foreach (split("\n",$code)) {
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s/\`([^\`]*)\`/eval $1/geo;
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s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo or
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s/\bret\b/bx lr/go or
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s/\bbx\s+lr\b/.word\t0xe12fff1e/go; # make it possible to compile with -march=armv4
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print $_,"\n";
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}
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close STDOUT; # enforce flush
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