New upstream version 2.0pre9.2
This commit is contained in:
geos_one
436
src/base/dev/misc/8042.c
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436
src/base/dev/misc/8042.c
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/*
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* (C) Copyright 1992, ..., 2014 the "DOSEMU-Development-Team".
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*
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* for details see file COPYING in the DOSEMU distribution
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*/
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/*
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* DANG_BEGIN_MODULE
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*
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* Description: 8042 Keyboard controller chip emulation for DOSEMU.
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*
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* Exports: keyb_8042_init(void), keyb_8042_reset(void)
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*
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* Maintainers: Scott Buchholz, Rainer Zimmermann
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*
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* REMARK
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* This code provides truly rudimentary 8042 controller emulation.
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* Not having any documentation on the 8042 makes it hard to improve. :)
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*
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* /REMARK
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* DANG_END_MODULE
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*
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*/
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#include "emu.h"
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#include "iodev.h"
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#include "int.h"
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#include "port.h"
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#include "memory.h"
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#include "keyboard/keyboard.h"
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#include "keyboard/keyb_server.h"
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#include "keyboard/keyb_clients.h"
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#include "speaker.h"
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#include "hma.h"
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/* bios-assisted keyboard read hack */
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#define KBD_READ_HACK 0
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#define RESET_LINE_MASK 1
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/* accurate emulation of special 8042 and keyboard commands - currently untested...
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*/
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#define KEYB_CMD 1
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Bit8u port60_buffer = 0;
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Boolean port60_ready = 0;
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#if KBD_READ_HACK
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static Bit8u last_read_data;
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static Boolean last_read_valid;
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#endif
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static Boolean kbd_disabled;
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#if KEYB_CMD
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/* variable indicating the command status of the keyboard/8042.
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* if non-zero, e.g. a parameter byte to a command is expected.
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*/
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static int wstate = 0;
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static int rstate = 0;
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static int keyb_ctrl_scanmap = 1;
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static int keyb_ctrl_typematic = 0x23;
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static int keyb_ctrl_enable = 1;
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static int keyb_ctrl_isdata = 0;
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static Bit8u keyb_ctrl_command = 0x01;
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static inline void keyb_ctrl_clearbuf(void)
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{
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/* this probably ought to do something :) */
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}
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/* write byte to the 8042's output buffer */
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void output_byte_8042(Bit8u value)
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{
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port60_buffer=value;
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port60_ready=1;
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if (keyb_ctrl_command & 0x01) { /* if interrupt enabled */
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k_printf("8042: scheduling IRQ1\n");
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pic_request(1);
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}
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else
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k_printf("8042: interrupt flag OFF!\n");
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}
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static void ack(void)
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{
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write_queue(&keyb_queue, 0xfa);
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}
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static void write_port60(Bit8u value)
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{
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switch (wstate) {
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case 0x00:
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switch (value) {
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case 0xed: /* set mode indicators */
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h_printf("8042: write port 0x60 set mode indicators\n");
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ack();
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wstate=0xed;
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break;
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case 0xee: /* port check */
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h_printf("8042: write port 0x60 test mode 0xee\n");
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write_queue(&keyb_queue, 0xee);
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break;
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case 0xf0: /* set keyb scan byte */
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h_printf("8042: write port 0x60 set keyb scan type\n");
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ack();
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wstate=0xf0;
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break;
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case 0xf2: /* get keyb type */
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h_printf("8042: write port 0x60 get keyb type\n");
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ack();
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rstate=0xf2;
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break;
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case 0xf3: /* set typematic speed */
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h_printf("8042: write port 0x60 set typematic speed\n");
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ack();
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wstate=0xf3;
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break;
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case 0xf4: /* clear buffer */
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h_printf("8042: write port 0x60 clear buffer\n");
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keyb_ctrl_clearbuf();
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keyb_ctrl_enable=1;
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ack();
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break;
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case 0xf5: /* default, w/disable */
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h_printf("8042: write port 0x60 set default, w/disable\n");
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keyb_8042_reset();
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keyb_ctrl_enable = 0;
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ack();
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break;
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case 0xf6: /* set default */
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h_printf("8042: write port 0x60 set default\n");
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keyb_8042_reset();
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ack();
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break;
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case 0xf7: /* set all keys to typematic */
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case 0xf8: /* set all keys to make/break */
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case 0xf9: /* set all keys to make */
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case 0xfa: /* set all keys to typematic make/break */
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h_printf("8042: write port 0x60 set mode (0x%02x)\n", value);
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keyb_ctrl_clearbuf();
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ack();
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/* set mode ??? */
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break;
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case 0xfb: /* set single key to typematic & wait */
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case 0xfc: /* set to make/break & wait */
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case 0xfd: /* set to make & wait */
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h_printf("8042: write port 0x60 set mod (0x%02x)\n", value);
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keyb_ctrl_clearbuf();
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ack();
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wstate=value;
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break;
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case 0xfe: /* resend */
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h_printf("8042: write port 0x60 resend\n");
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write_queue(&keyb_queue, port60_buffer);
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break;
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case 0xff: /* reset */
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h_printf("8042: write port 0x60 reset\n");
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ack();
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rstate=0xff; /* wait for port 60h read */
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break;
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default:
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h_printf("8042: write port 0x60 unsupported command 0x%02x =>Error\n", value);
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write_queue(&keyb_queue, 0xfe);
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break;
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}
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break;
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case 0x60:
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h_printf("8042: write 8042 command byte 0x%02x\n", value);
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keyb_ctrl_command=value;
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/* no ack() */
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wstate=0;
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break;
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case 0xd1:
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h_printf("8042: drive output port lines, value=0x%02x\n", value);
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switch (value) {
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case 0xdf: /* enable A20 */
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h_printf("8042: enable A20 line\n");
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set_a20(1);
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break;
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case 0xdd: /* disable A20) */
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h_printf("8042: disable A20 line\n");
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set_a20(0);
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break;
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}
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port60_ready=0;
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wstate=0;
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break;
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case 0xed: /* set LED mode */
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{
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t_modifiers modifiers = 0;
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h_printf("8042: write port 0x60 set LED mode to 0x%02x\n", value);
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/* TESTME this mapping is an educated guess */
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if (value & 0x01) modifiers |= MODIFIER_SCR;
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if (value & 0x02) modifiers |= MODIFIER_NUM;
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if (value & 0x04) modifiers |= MODIFIER_CAPS;
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keyb_client_set_leds(modifiers);
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ack();
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wstate=0;
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break;
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}
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case 0xf0: /* get/set keyboard scan map */
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h_printf("8042: write port 0x60 get/set keyboard scan map 0x%02x\n", value);
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ack();
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if (value == 0)
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write_queue(&keyb_queue, keyb_ctrl_scanmap);
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else
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keyb_ctrl_scanmap=value;
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wstate=0;
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break;
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case 0xf3: /* set typematic rate */
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h_printf("8042: write port 0x60 set typematic rate 0x%02x\n", value);
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keyb_ctrl_typematic = value;
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ack();
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wstate=0;
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break;
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default:
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h_printf("8042: write port 0x60 illegal state (0x%02x), resending\n",
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wstate);
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wstate=0;
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write_port60(value);
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}
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}
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/* write to port 64h (8042 command register) */
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static void write_port64(Bit8u value) {
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k_printf("8042: write port64h, =%02x\n",value);
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switch(value) {
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case 0x20: /* read 8042 command byte */
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output_byte_8042(keyb_ctrl_command);
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break;
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case 0x60: /* write 8042 command byte */
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wstate=0x60;
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break;
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#if 0 /* not sure if these are ok and/or needed. */
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case 0xa4: /* passwort installed test */
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output_byte_8042(0xfa); /* no password */
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break;
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case 0xa5: /* load password */
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/* XXX ... we should read bytes from port60 until 0 is found */
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break;
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case 0xa9: /* aux interface test */
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output_byte_8042(0x00); /* ok */
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break;
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case 0xaa: /* 8042 self test */
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output_byte_8042(0x55); /* ok */
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break;
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case 0xab: /* keyboard interface test */
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output_byte_8042(0x00); /* ok */
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break;
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case 0xc0: /* read 8042 input port */
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output_byte_8042(0xff); /* just send _something_... */
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break;
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#endif
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case 0xad:
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kbd_disabled = 1;
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break;
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case 0xae:
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kbd_disabled = 0;
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#if KBD_READ_HACK
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last_read_valid = 0;
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#endif
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break;
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case 0xd1: /* next write to port 0x60 drives hardware port */
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wstate=0xd1;
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break;
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case 0xf0 ... 0xff: /* produce 6ms pulse on hardware port */
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wstate=0;
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port60_ready=0;
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if (!(value & RESET_LINE_MASK)) {
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h_printf("8042: produce 6ms pulse on cpu reset line\n");
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cpu_reset();
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}
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else
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h_printf("8042: produce 6ms pulse on hardware port, ignored\n");
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break;
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default:
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h_printf("8042: write port 0x64 unsupported command 0x%02x, ignored\n",
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value);
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/* various other commands... ignore */
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break;
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}
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}
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#endif
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static Bit8u read_port60(void)
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{
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Bit8u r;
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#if KBD_READ_HACK
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if (kbd_disabled && last_read_valid) {
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r = last_read_data;
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if (port60_ready && (keyb_ctrl_command & 0x01)) /* if interrupt enabled */
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pic_request(1);
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} else {
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r = port60_buffer;
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port60_ready = 0;
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last_read_data = r;
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last_read_valid = 1;
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}
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#else
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r = port60_buffer;
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port60_ready = 0;
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#endif
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h_printf("8042: read port 0x60 = 0x%02x\n", r);
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#if KEYB_CMD
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switch (rstate) {
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case 0xf2: /* get keyboard type, MSB */
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h_printf("8042: read port 0x60, getting keyboard type (MSB)\n");
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output_byte_8042(0x83);
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rstate = 0x72;
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break;
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case 0x72: /* get keyboard type, LSB */
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h_printf("8042: read port 0x60, getting keyboard type (LSB)\n");
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output_byte_8042(0xab);
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rstate = 0;
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break;
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case 0xff: /* reset keyboard */
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h_printf("8042: read port 0x60, resetting\n");
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output_byte_8042(0xaa); /* BAT completion code */
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rstate = 0;
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break;
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default: /* invalid state ?! */
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rstate = 0;
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break;
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}
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#endif
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return r;
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}
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Bit8u keyb_io_read(ioport_t port, void *arg)
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{
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Bit8u r = 0;
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switch (port) {
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case 0x60:
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r = read_port60();
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if (!port60_ready)
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pic_untrigger(1);
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k_printf("8042: read port 0x60 read=0x%02x\n",r);
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break;
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case 0x61:
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/* Handle only PC-Speaker right now */
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r = spkr_io_read(port);
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break;
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case 0x64:
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r= 0x1c | (port60_ready ? 0x01 : 0x00);
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k_printf("8042: read port 0x64 status check=0x%02x, port60_ready=%d\n",
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r, port60_ready);
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}
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return r;
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}
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void keyb_io_write(ioport_t port, Bit8u value, void *arg)
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{
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switch (port) {
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case 0x60:
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k_printf("8042: write port 0x60 outb = 0x%x\n", value);
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#if KEYB_CMD
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write_port60(value);
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#endif
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break;
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case 0x61:
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if (value & 0x80) {
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k_printf("8042: IRQ ACK, %i\n", port60_ready);
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int_check_queue(); /* reschedule irq1 if appropriate */
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}
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spkr_io_write(port, value);
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break;
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case 0x64:
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k_printf("8042: write port 0x64 outb = 0x%x\n", value);
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write_port64(value);
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break;
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}
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}
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void keyb_8042_init(void)
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{
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emu_iodev_t io_device;
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/* 8042 keyboard controller */
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io_device.read_portb = keyb_io_read;
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io_device.write_portb = keyb_io_write;
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io_device.read_portw = NULL;
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io_device.write_portw = NULL;
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io_device.read_portd = NULL;
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io_device.write_portd = NULL;
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io_device.handler_name = "8042 Keyboard data";
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io_device.start_addr = 0x0060;
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io_device.end_addr = 0x0060;
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port_register_handler(io_device, 0);
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io_device.handler_name = "8042 Keyboard command";
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io_device.start_addr = 0x0064;
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io_device.end_addr = 0x0064;
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port_register_handler(io_device, 0);
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io_device.handler_name = "Keyboard controller port B";
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io_device.start_addr = 0x0061;
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io_device.end_addr = 0x0061;
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port_register_handler(io_device, 0);
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}
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void keyb_8042_reset(void)
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{
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#if KEYB_CMD
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rstate = 0;
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wstate = 0;
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keyb_ctrl_scanmap = 1;
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keyb_ctrl_typematic = 0x23;
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keyb_ctrl_enable = 1;
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keyb_ctrl_isdata = 0;
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keyb_ctrl_clearbuf();
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#endif
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port60_buffer = 0;
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port60_ready = 0;
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}
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