#qemu-only -> submit upstream qemu 
Index: kvm-75/qemu/hw/ide.c
===================================================================
--- kvm-75.orig/qemu/hw/ide.c
+++ kvm-75/qemu/hw/ide.c
@@ -462,6 +462,7 @@ static inline int media_is_cd(IDEState *
 #define IDE_TYPE_PIIX3   0
 #define IDE_TYPE_CMD646  1
 #define IDE_TYPE_PIIX4   2
+#define IDE_TYPE_ICH6    3
 
 /* CMD646 specific */
 #define MRDMODE		0x71
@@ -3164,6 +3165,57 @@ void pci_piix3_ide_init(PCIBus *bus, Blo
 
     qemu_register_reset(piix3_reset, d);
     piix3_reset(d);
+
+    pci_register_io_region((PCIDevice *)d, 4, 0x10,
+                           PCI_ADDRESS_SPACE_IO, bmdma_map);
+
+    ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]);
+    ide_init2(&d->ide_if[2], hd_table[2], hd_table[3], pic[15]);
+    ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
+    ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
+
+    for (i = 0; i < 4; i++)
+        if (hd_table[i])
+            hd_table[i]->devfn = d->dev.devfn;
+
+    register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d);
+}
+
+
+/* hd_table must contain 4 block drivers */
+/* NOTE: for the ICH-6, the IRQs and IOports are hardcoded */
+void pci_ich6_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
+                        qemu_irq *pic)
+{
+    PCIIDEState *d;
+    uint8_t *pci_conf;
+    int i;
+
+    /* register a function 1 of ICH-6 */
+    d = (PCIIDEState *)pci_register_device(bus, "ICH-6 IDE",
+                                           sizeof(PCIIDEState),
+                                           devfn,
+                                           NULL, NULL);
+    d->type = IDE_TYPE_ICH6;
+
+    pci_conf = d->dev.config;
+    pci_conf[0x00] = 0x86; // Intel
+    pci_conf[0x01] = 0x80;
+    pci_conf[0x02] = 0x9e;
+    pci_conf[0x03] = 0x26;
+
+    pci_conf[0x09] = 0x80; // legacy ATA mode
+    pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
+    pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
+    pci_conf[0x0e] = 0x00; // header_type
+
+    pci_conf[0x40] = 0;
+    pci_conf[0x41] = 0xf0; // primary port enabled
+    pci_conf[0x42] = 0;
+    pci_conf[0x43] = 0x00; // secondary port disabled
+
+    qemu_register_reset(piix3_reset, d);
+    piix3_reset(d);
 
     pci_register_io_region((PCIDevice *)d, 4, 0x10,
                            PCI_ADDRESS_SPACE_IO, bmdma_map);
Index: kvm-75/qemu/hw/irq.c
===================================================================
--- kvm-75.orig/qemu/hw/irq.c
+++ kvm-75/qemu/hw/irq.c
@@ -35,6 +35,7 @@ void qemu_set_irq(qemu_irq irq, int leve
     if (!irq)
         return;
 
+//printf("IRQ set %#hhx = %#hhd using %p\n", irq->n, level, irq->handler);
     irq->handler(irq->opaque, irq->n, level);
 }
 
Index: kvm-75/qemu/hw/pc.h
===================================================================
--- kvm-75.orig/qemu/hw/pc.h
+++ kvm-75/qemu/hw/pc.h
@@ -145,6 +145,8 @@ void pci_piix3_ide_init(PCIBus *bus, Blo
                         qemu_irq *pic);
 void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
                         qemu_irq *pic);
+void pci_ich6_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
+                        qemu_irq *pic);
 
 /* ne2000.c */