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linamh/sys-libs/glibc/files/2.3.4/glibc-2.3.4-nptl-altivec.patch

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add glibc 2.10.1 for arm arch git-svn-id: https://svn.disconnected-by-peer.at/svn/linamh/trunk/linamh@1552 6952d904-891a-0410-993b-d76249ca496b
2009-09-12 10:46:08 +02:00
diff -urN libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S libc23/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S
--- libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S 2004-05-28 16:19:18.000000000 -0500
+++ libc23/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S 2004-06-14 19:28:43.131988368 -0500
@@ -187,8 +187,8 @@
addi r9,r9,32
stvx v18,0,r10
- stvx v11,0,r9
- addi r19,r10,32
+ stvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
stvx v20,0,r10
@@ -221,11 +221,6 @@
addi r10,r10,32
addi r9,r9,32
- stvx v10,0,r10
- stvx v11,0,r9
- addi r10,r10,32
- addi r9,r9,32
-
mfvscr v0
mfspr r0,VRSAVE
stvx v0,0,r10
diff -urN libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext.S libc23/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext.S
--- libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext.S 2004-05-28 16:19:18.000000000 -0500
+++ libc23/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext.S 2004-06-14 19:36:33.639954472 -0500
@@ -133,8 +133,8 @@
addi r9,r9,32
lvx v18,0,r10
- lvx v11,0,r9
- addi r19,r10,32
+ lvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
lvx v20,0,r10
diff -urN libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext.S libc23/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext.S
--- libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext.S 2004-05-28 16:19:18.000000000 -0500
+++ libc23/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext.S 2004-06-14 19:39:49.580990280 -0500
@@ -189,8 +189,8 @@
addi r9,r9,32
stvx v18,0,r10
- stvx v11,0,r9
- addi r19,r10,32
+ stvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
stvx v20,0,r10
@@ -223,11 +223,6 @@
addi r10,r10,32
addi r9,r9,32
- stvx v10,0,r10
- stvx v11,0,r9
- addi r10,r10,32
- addi r9,r9,32
-
mfvscr v0
mfspr r0,VRSAVE
stvx v0,0,r10
@@ -339,8 +334,8 @@
addi r9,r9,32
lvx v18,0,r10
- lvx v11,0,r9
- addi r19,r10,32
+ lvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
lvx v20,0,r10
diff -urN libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S libc23/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S
--- libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S 2004-05-28 16:19:18.000000000 -0500
+++ libc23/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S 2004-06-14 19:27:34.406052600 -0500
@@ -268,21 +268,22 @@
stfd fp0,(SIGCONTEXT_FP_REGS+(32*8))(r3)
ld r5,.LC__dl_hwcap@toc(r2)
- li r10,0
# ifdef SHARED
/* Load _rtld-global._dl_hwcap. */
ld r5,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(r5)
# else
ld r5,0(r5) /* Load extern _dl_hwcap. */
-# endif
- andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
- beq L(has_no_vec)
-
+# endif
la r10,(SIGCONTEXT_V_RESERVE+8)(r3)
la r9,(SIGCONTEXT_V_RESERVE+24)(r3)
+
+ andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
+
clrrdi r10,r10,4
+ beq L(has_no_vec)
clrrdi r9,r9,4
-
+ mr r5,r10 /* Capture *v_regs value in r5. */
+
stvx v0,0,r10
stvx v1,0,r9
addi r10,r10,32
@@ -329,8 +330,8 @@
addi r9,r9,32
stvx v18,0,r10
- stvx v11,0,r9
- addi r19,r10,32
+ stvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
stvx v20,0,r10
@@ -363,11 +364,6 @@
addi r10,r10,32
addi r9,r9,32
- stvx v10,0,r10
- stvx v11,0,r9
- addi r10,r10,32
- addi r9,r9,32
-
mfvscr v0
mfspr r0,VRSAVE
stvx v0,0,r10
@@ -378,7 +374,7 @@
Store either a NULL or a quadword aligned pointer to the Vector register
array into *v_regs.
*/
- std r10,(SIGCONTEXT_V_REGS_PTR)(r3)
+ std r5,(SIGCONTEXT_V_REGS_PTR)(r3)
addi r5,r3,UCONTEXT_SIGMASK
li r4,0
diff -urN libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S libc23/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S
--- libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S 2004-05-28 16:19:18.000000000 -0500
+++ libc23/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S 2004-06-09 11:28:37.000000000 -0500
@@ -293,8 +293,8 @@
addi r9,r9,32
lvx v18,0,r10
- lvx v11,0,r9
- addi r19,r10,32
+ lvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
lvx v20,0,r10
diff -urN libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S libc23/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S
--- libc23-cvstip-20040607/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S 2004-05-28 16:19:18.000000000 -0500
+++ libc23/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S 2004-06-14 19:28:05.164035488 -0500
@@ -391,20 +391,22 @@
stfd fp0,(SIGCONTEXT_FP_REGS+(32*8))(r3)
ld r8,.LC__dl_hwcap@toc(r2)
- li r10,0
#ifdef SHARED
/* Load _rtld-global._dl_hwcap. */
ld r8,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(r8)
#else
ld r8,0(r8) /* Load extern _dl_hwcap. */
#endif
- andis. r8,r8,(PPC_FEATURE_HAS_ALTIVEC >> 16)
- beq L(has_no_vec)
-
la r10,(SIGCONTEXT_V_RESERVE+8)(r3)
la r9,(SIGCONTEXT_V_RESERVE+24)(r3)
+
+ andis. r8,r8,(PPC_FEATURE_HAS_ALTIVEC >> 16)
+
clrrdi r10,r10,4
+ beq L(has_no_vec)
+
clrrdi r9,r9,4
+ mr r8,r10 /* Capture *v_regs value in r5. */
stvx v0,0,r10
stvx v1,0,r9
@@ -452,8 +454,8 @@
addi r9,r9,32
stvx v18,0,r10
- stvx v11,0,r9
- addi r19,r10,32
+ stvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
stvx v20,0,r10
@@ -486,11 +488,6 @@
addi r10,r10,32
addi r9,r9,32
- stvx v10,0,r10
- stvx v11,0,r9
- addi r10,r10,32
- addi r9,r9,32
-
mfvscr v0
mfspr r0,VRSAVE
stvx v0,0,r10
@@ -501,7 +498,7 @@
Store either a NULL or a quadword aligned pointer to the Vector register
array into *v_regs.
*/
- std r10,(SIGCONTEXT_V_REGS_PTR)(r3)
+ std r8,(SIGCONTEXT_V_REGS_PTR)(r3)
mr r31,r4
addi r5,r3,UCONTEXT_SIGMASK
@@ -596,8 +593,8 @@
addi r9,r9,32
lvx v18,0,r10
- lvx v11,0,r9
- addi r19,r10,32
+ lvx v19,0,r9
+ addi r10,r10,32
addi r9,r9,32
lvx v20,0,r10
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